SNAS635F December   2013  – August 2025 LMK00334

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements, Propagation Delay, and Output Skew
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Differential Voltage Measurement Terminology
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Crystal Power Dissipation vs RLIM
      2. 7.3.2 Clock Inputs
      3. 7.3.3 Clock Outputs
        1. 7.3.3.1 Reference Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 VCC and VCCO Power Supplies
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Driving the Clock Inputs
        2. 8.2.1.2 Crystal Interface
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Termination and Use of Clock Drivers
        2. 8.2.2.2 Termination for DC-Coupled Differential Operation
        3. 8.2.2.3 Termination for AC-Coupled Differential Operation
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Current Consumption and Power Dissipation Calculations
        1. 8.3.1.1 Power Dissipation Example: Worst-Case Dissipation
      2. 8.3.2 Power Supply Bypassing
        1. 8.3.2.1 Power Supply Ripple Rejection
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Management
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1 Current Consumption and Power Dissipation Calculations

The current consumption values specified in Electrical Characteristics can be used to calculate the total power dissipation and IC power dissipation for any device configuration. The total VCC core supply current (ICC_TOTAL) can be calculated using Equation 5:

Equation 5. ICC_TOTAL = ICC_CORE + ICC_BANKS + ICC_CMOS

where

  • ICC_CORE is the VCC current for core logic and input blocks and depends on selected input (CLKinX or OSCin).
  • ICC_HCSL is the VCC current for Banks A and B
  • ICC_CMOS is the VCC current for the LVCMOS output (or 0mA if REFout is disabled).

Because the output supplies (VCCOA, VCCOB, VCCOC) can be powered from three independent voltages, the respective output supply currents (ICCO_BANK_A, ICCO_BANK_B, and ICCO_CMOS) must be calculated separately.

ICCO_BANK for either Bank A or B can be taken as 50% of the corresponding output supply current specified for two banks (ICCO_HCSL) provided the output loading matches the specified conditions. Otherwise, ICCO_BANK must be calculated per bank as shown in Equation 6:

Equation 6. ICCO_BANK = IBANK_BIAS + (N × IOUT_LOAD)

where

  • IBANK_BIAS is the output bank bias current (fixed value).
  • IOUT_LOAD is the DC load current per loaded output pair.
  • N is the number of loaded output pairs (N = 0 to 2).

Table 8-1 shows the typical IBANK_BIAS values and IOUT_LOAD expressions for HCSL.

Table 8-1 Typical Output Bank Bias and Load Currents
CURRENT PARAMETERHCSL
IBANK_BIAS2.4mA
IOUT_LOADVOH/RT

Once the current consumption is known for each supply, the total power dissipation (PTOTAL) can be calculated by Equation 7:

Equation 7. PTOTAL = (VCC × ICC_TOTAL) + (VCCOA × ICCO_BANK) + (VCCOB × ICCO_BANK) + (VCCOC × ICCO_CMOS)

If the device is configured with HCSL outputs, then calculating the power dissipated in any termination resistors (PRT_HCSL) is also necessary. The external power dissipation values can be calculated by Equation 8:

Equation 8. PRT_HCSL (per HCSL pair) = VOH2 / RT

Finally, the IC power dissipation (PDEVICE) can be computed by subtracting the external power dissipation values from PTOTAL as shown in Equation 9:

Equation 9. PDEVICE = PTOTAL – N × PRT_HCSL

where

  • N is the number of HCSL output pairs with termination resistors to GND.