Motor Control Signals
When BRAKE pin is driven
enters brake state. Low-side braking (see Section 18.104.22.168) is implemented during this brake state.
decreases output speed to value defined by BRAKE_DUTY_THRESHOLD before entering brake state. As long as
BRAKE is driven 'High', MCT8316A
stays in brake state. Brake pin input can be overwritten by configuring
BRAKE_INPUT over the I2C interface.
- The DIR pin decides the direction
of motor spin; when driven 'High', the sequence is OUT A → OUT C → OUT B, and when driven
'Low' the sequence is OUT A → OUT B → OUT C. DIR pin
input can be overwritten by configuring DIR_INPUT over the I2C
- When DRVOFF pin is driven 'High',
stops driving the motor by turning OFF all MOSFETs (coast state). When DRVOFF is
driven 'Low', MCT8316A
returns to normal state of operation, as if it was restarting the motor (see
Section 8.5.1). DRVOFF does not cause the device to go to sleep or standby
mode; the digital core is still active. Entry and exit from sleep or standby
condition is controlled by SPEED pin.
- SPEED/WAKE pin is used to control
motor speed and wake up MCT8316A
from sleep mode. SPEED pin can be configured to accept PWM, frequency or analog
input signals. It is used to enter and exit from sleep and standby mode (see
External Oscillator and Watchdog
- EXT_CLK pin may be used to provide an external clock reference (see Section 22.214.171.124).
- EXT_WD pin may be used to
provide an external watchdog signal (see Section 8.5.5).
- DACOUT1 outputs internal
variable defined by address in register DACOUT1_VAR_ADDR, the output of
DACOUT1 is refreshed every PWM cycle (see Section 8.5.2).
- DACOUT2 outputs internal variable defined by address in register
DACOUT2_VAR_ADDR, the output of DACOUT2 is refreshed every PWM cycle (see
- FG pin provides pulses which are proportional to motor
speed (see Section 8.3.20).
- nFAULT pin provides fault status in device or motor
- SOX pin provides the output of one of the current sense