SLLSFH8A August   2021  – December 2021 MCT8316A

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Characteristics of the SDA and SCL bus for Standard and Fast mode
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Output Stage
      2. 8.3.2  Device Interface Modes
        1. 8.3.2.1 Interface - Control and Monitoring
        2. 8.3.2.2 I2C Interface
        3. 8.3.2.3 Hardware Interface - Pin Configuration
      3. 8.3.3  Step-Down Mixed-Mode Buck Regulator
        1. 8.3.3.1 Buck in Inductor Mode
        2. 8.3.3.2 Buck in Resistor mode
        3. 8.3.3.3 Buck Regulator with External LDO
        4. 8.3.3.4 AVDD Power Sequencing from Buck Regulator
        5. 8.3.3.5 Mixed Mode Buck Operation and Control
        6. 8.3.3.6 Buck Undervoltage Protection
        7. 8.3.3.7 Buck Overcurrent Protection
      4. 8.3.4  AVDD Linear Voltage Regulator
      5. 8.3.5  Charge Pump
      6. 8.3.6  Slew Rate Control
      7. 8.3.7  Cross Conduction (Dead Time)
      8. 8.3.8  SPEED Control
        1. 8.3.8.1 Analog-Mode Speed Control
        2. 8.3.8.2 PWM-Mode Speed Control
        3. 8.3.8.3 I2C based Speed Control
        4. 8.3.8.4 Frequency-Mode Speed Control
      9. 8.3.9  Starting the Motor Under Different Initial Conditions
        1. 8.3.9.1 Case 1 – Motor is Stationary
        2. 8.3.9.2 Case 2 – Motor is Spinning in the Forward Direction
        3. 8.3.9.3 Case 3 – Motor is Spinning in the Reverse Direction
      10. 8.3.10 Motor Start Sequence (MSS)
        1. 8.3.10.1 Initial Speed Detect (ISD)
        2. 8.3.10.2 Motor Resynchronization
        3. 8.3.10.3 Reverse Drive
        4. 8.3.10.4 Motor Start-up
          1. 8.3.10.4.1 Align
          2. 8.3.10.4.2 Double Align
          3. 8.3.10.4.3 Initial Position Detection (IPD)
            1. 8.3.10.4.3.1 IPD Operation
            2. 8.3.10.4.3.2 IPD Release Mode
            3. 8.3.10.4.3.3 IPD Advance Angle
          4. 8.3.10.4.4 Slow First Cycle Startup
          5. 8.3.10.4.5 Open loop
          6. 8.3.10.4.6 Transition from Open to Closed Loop
      11. 8.3.11 Closed Loop Operation
        1. 8.3.11.1 120o Commutation
          1. 8.3.11.1.1 High-Side Modulation
          2. 8.3.11.1.2 Low-Side Modulation
          3. 8.3.11.1.3 Mixed Modulation
        2. 8.3.11.2 Variable Commutation (Available only in MCT8316AV)
        3. 8.3.11.3 Lead Angle Control
        4. 8.3.11.4 Closed loop accelerate
      12. 8.3.12 Speed Loop (Available only in MCT8316AV)
      13. 8.3.13 Input Power Regulation (Available only in MCT8316AV)
      14. 8.3.14 Anti-Voltage Surge (AVS)
      15. 8.3.15 Output PWM Switching Frequency
      16. 8.3.16 Fast Start-up (< 50 ms)
        1. 8.3.16.1 BEMF Threshold
        2. 8.3.16.2 Dynamic Degauss
      17. 8.3.17 Fast Deceleration
      18. 8.3.18 Active Demagnetization
        1. 8.3.18.1 Active Demagnetization in action
      19. 8.3.19 Motor Stop Options
        1. 8.3.19.1 Coast (Hi-Z) Mode
        2. 8.3.19.2 Recirculation Mode
        3. 8.3.19.3 Low-Side Braking
        4. 8.3.19.4 High-Side Braking
        5. 8.3.19.5 Active Spin-Down
      20. 8.3.20 FG Configuration
        1. 8.3.20.1 FG Output Frequency
        2. 8.3.20.2 FG Open-Loop and Lock Behavior
      21. 8.3.21 Protections
        1. 8.3.21.1  VM Supply Undervoltage Lockout
        2. 8.3.21.2  AVDD Undervoltage Lockout (AVDD_UV)
        3. 8.3.21.3  BUCK Undervoltage Lockout (BUCK_UV)
        4. 8.3.21.4  VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 8.3.21.5  Overvoltage Protection (OVP)
        6. 8.3.21.6  Overcurrent Protection (OCP)
          1. 8.3.21.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 8.3.21.6.2 OCP Automatic Retry (OCP_MODE = 01b)
          3. 8.3.21.6.3 OCP Report Only (OCP_MODE = 10b)
          4. 8.3.21.6.4 OCP Disabled (OCP_MODE = 11b)
        7. 8.3.21.7  Buck Overcurrent Protection
        8. 8.3.21.8  Cycle-by-Cycle (CBC) Current Limit (CBC_ILIMIT)
          1. 8.3.21.8.1 CBC_ILIMIT Automatic Recovery next PWM Cycle (CBC_ILIMIT_MODE = 000xb)
          2. 8.3.21.8.2 CBC_ILIMIT Automatic Recovery Threshold Based (CBC_ILIMIT_MODE = 001xb)
          3. 8.3.21.8.3 CBC_ILIMIT Automatic Recovery after 'n' PWM Cycles (CBC_ILIMIT_MODE = 010xb)
          4. 8.3.21.8.4 CBC_ILIMIT Report Only (CBC_ILIMIT_MODE = 0110b)
          5. 8.3.21.8.5 CBC_ILIMIT Disabled (CBC_ILIMIT_MODE = 0111b or 1xxxb)
        9. 8.3.21.9  Lock Detection Current Limit (LOCK_ILIMIT)
          1. 8.3.21.9.1 LOCK_ILIMIT Latched Shutdown (LOCK_ILIMIT_MODE = 00xxb)
          2. 8.3.21.9.2 LOCK_ILIMIT Automatic Recovery (LOCK_ILIMIT_MODE = 01xxb)
          3. 8.3.21.9.3 LOCK_ILIMIT Report Only (LOCK_ILIMIT_MODE = 1000b)
          4. 8.3.21.9.4 LOCK_ILIMIT Disabled (LOCK_ILIMIT_MODE = 1xx1b)
        10. 8.3.21.10 Thermal Warning (OTW)
        11. 8.3.21.11 Thermal Shutdown (TSD)
        12. 8.3.21.12 Motor Lock (MTR_LCK)
          1. 8.3.21.12.1 MTR_LCK Latched Shutdown (MTR_LCK_MODE = 00xxb)
          2. 8.3.21.12.2 MTR_LCK Automatic Recovery (MTR_LCK_MODE= 01xxb)
          3. 8.3.21.12.3 MTR_LCK Report Only (MTR_LCK_MODE = 1000b)
          4. 8.3.21.12.4 MTR_LCK Disabled (MTR_LCK_MODE = 1xx1b)
        13. 8.3.21.13 Motor Lock Detection
          1. 8.3.21.13.1 Lock 1: Abnormal Speed (ABN_SPEED)
          2. 8.3.21.13.2 Lock 2: Loss of Sync (LOSS_OF_SYNC)
          3. 8.3.21.13.3 Lock3: No-Motor Fault (NO_MTR)
        14. 8.3.21.14 IPD Faults
    4. 8.4 Device Functional Modes
      1. 8.4.1 Functional Modes
        1. 8.4.1.1 Sleep Mode
        2. 8.4.1.2 Standby Mode
        3. 8.4.1.3 Fault Reset (CLR_FLT)
    5. 8.5 External Interface
      1. 8.5.1 DRVOFF Functionality
      2. 8.5.2 DAC outputs
      3. 8.5.3 SOX Output
      4. 8.5.4 Oscillator Source
        1. 8.5.4.1 External Clock Source (Available for MCT8316AV)
      5. 8.5.5 External Watchdog (Available only in MCT836AV)
    6. 8.6 EEPROM access and I2C interface
      1. 8.6.1 EEPROM Access
        1. 8.6.1.1 EEPROM Write
        2. 8.6.1.2 EEPROM Read
      2. 8.6.2 I2C Serial Interface (Available only in MCT8316AV)
        1. 8.6.2.1 I2C Data Word
        2. 8.6.2.2 I2C Write Operation
        3. 8.6.2.3 I2C Read Operation
        4. 8.6.2.4 Examples of MCT8316A I2C Communication Protocol Packets
        5. 8.6.2.5 Internal Buffers
        6. 8.6.2.6 CRC Byte Calculation
    7. 8.7 EEPROM (Non-Volatile) Register Map
      1. 8.7.1 Algorithm_Configuration Registers
      2. 8.7.2 Fault_Configuration Registers
      3. 8.7.3 Hardware_Configuration Registers
      4. 8.7.4 Gate_Driver_Configuration Registers
    8. 8.8 RAM (Volatile) Register Map
      1. 8.8.1 Fault_Status Registers
      2. 8.8.2 System_Status Registers
      3. 8.8.3 Algo_Control Registers
      4. 8.8.4 Device_Control Registers
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application curves
        1. 9.2.1.1 Motor startup
        2. 9.2.1.2 120o and variable commutation
        3. 9.2.1.3 Faster startup time
        4. 9.2.1.4 Setting the BEMF threshold
        5. 9.2.1.5 Maximum speed
        6. 9.2.1.6 Faster deceleration
  10. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
      1. 11.3.1 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Support Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Hardware Interface - Pin Configuration

MCT8316AT allows configuration of motor control algorithm and driver parameters through the pull-down resistors connected to the device configuration pins, RMP_1, RMP_2, LDANGLE, CONFIG_1, ILIMIT, SLEW_RATE, CONFIG_2 and CONFIG_3. This allows quick and easy configuration of the MCT8316 motor control and gate driver parameters without the need for EEPROM programming through I2C interface. The parameters that can be configured by each device configuration pin are detailed inTable 8-1 .

Table 8-1 Pin configurable parameters
Pin Configurable Parameters
RMP_1, RMP_2 Start-up method, open loop acceleration rate, closed loop acceleration rate, first cycle frequency, align time, dynamic degauss enable, fast start-up enable, stationary brake time, auto handoff enable, handoff threshold, open loop duty, align ramp rate
LDANGLE Lead angle or BEMF threshold
CONFIG_1 PWM switching frequency, ZC detection blanking time, IPD clock frequency
ILIMIT, SLEW_RATE CBC limit, open loop, align and IPD current limit, buck output voltage selection, phase output voltage slew rate
CONFIG_2 OCP level, OCP mode, AAR enable, delay compensation enable
CONFIG_3 Abnormal speed, minimum duty

RMP_1 and RMP_2 pins are used to set the start-up method (Double Align or IPD), open loop acceleration rate A1 (OL_ACC_A1 in Hz/s), closed loop acceleration rate (CL_ACC in V/s), startup brake time (STARTUP_BRK_TIME in ms), first cycle frequency (SLOW_FIRST_CYCLE_FREQ in Hz) and align time (ALIGN_TIME in ms, if Double Align is selected).

RMP_1 is used to set the start-up method and the inertia profile of the motor-load system. Inertia profiles range from ultra-high inertia (like ceiling fans) to ultra-high acceleration (like fuel pumps) with some example applications for each type of inertia profile given in Table 8-2. Once the inertia profile is chosen using RMP_1 pin, RMP_2 pin is used to set parameters like CL_ACC, OL_ACC_A1, STARTUP_BRK_TIME, SLOW_FIRST_CYC_FREQ, ALIGN_TIME (if applicable).

Based on the inertia profile and CL_ACC chosen, other parameters including IPD repeat times (IPD_REPEAT), dynamic degauss enable (DYN_DEGAUSS_EN), auto handoff enable (AUTO_HANDOFF), handoff threshold (OPN_CL_HANDOFF_THR), OL duty (OL_DUTY), align ramp rate (ALIGN_RAMP_RATE) and fast start-up enable (INTEG_ZC_METHOD) are auto-selected as per Tables through 12-11. Note that Open loop acceleration rate A2 (OL_ACC_A2 in Hz/s2) is set to the same value as that of OL_ACC_A1.

Table 8-2 Resistor values for configuring parameters on RMP_1 pin
Level Resistor value, RMP_1 MTR_STARTUP RMP_2 configuration classification based on motor-load inertia or acceleration rate ALIGN_RAMP_RATE (V/s) CL_ACC (V/s) OL_DUTY (%)
0 Tied to GND Double Align Ultra-high inertia 10 1, 2 15
1 4.7kΩ, ±5% Very high inertia 5, 10
2 10kΩ, ±5% High inertia 100 15, 20 20
3 15kΩ, ±5% Low acceleration 25, 50
4 22kΩ, ±5% Medium acceleration 500 75, 100 25
5 30kΩ, ±5% High acceleration 150, 200
6 39kΩ, ±5% Very high acceleration 1000 250, 500 40
7 51kΩ, ±5% Ultra-high acceleration 1000, 32767
8 62kΩ, ±5% IPD Ultra-high inertia 10 1, 2 15
9 75kΩ, ±5% Very high inertia 5, 10
10 91kΩ, ±5% High inertia 100 15, 20 20
11 110kΩ, ±5% Low acceleration 25, 50
12 150kΩ, ±5% Medium acceleration 500 75, 100 25
13 200kΩ, ±5% High acceleration 150, 200
14 240kΩ, ±5% Very high acceleration 1000 250, 500 40
15 300kΩ, ±5% Ultra-high acceleration 1000, 32767
Table 8-3 Parameter values on RMP_2 pin for ultra-high inertia applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tied to GND 10000 N 0.01 5000 1 0.005
1 4.7kΩ, ±5% 6000 N
2 10kΩ, ±5% 10000 N 0.025
3 15kΩ, ±5% 6000 N
4 22kΩ, ±5% 4000 N 0.05 2000
5 30kΩ, ±5% 2000 N
6 39kΩ, ±5% 4000 N 0.075
7 51kΩ, ±5% 2000 N
8 62kΩ, ±5% 6000 N 0.025 1000 2 0.025
9 75kΩ, ±5% 4000 N
10 91kΩ, ±5% 6000 N 0.05
11 110kΩ, ±5% 4000 N
12 150kΩ, ±5% 2000 N 0.075 500
13 200kΩ, ±5% 1000 N
14 240kΩ, ±5% 2000 N 0.1
15 300kΩ, ±5% 1000 N

For all resistor values in Table 8-3, AUTO_HANDOFF is enabled (1b), OPN_CL_HANDOFF_THR is 600Hz, INTEG_ZC_METHOD is disabled (0b), IPD_REPEAT is 3.

Table 8-4 Parameter values on RMP_2 pin for very high inertia applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tie to GND 6000 N 0.05 1000 5 0.05
1 4.7kΩ, ±5% 4000 N
2 10kΩ, ±5% 6000 N 0.075
3 15kΩ, ±5% 4000 N
4 22kΩ, ±5% 2000 N 0.1 500
5 30kΩ, ±5% 1000 N
6 39kΩ, ±5% 2000 N 0.25
7 51kΩ, ±5% 1000 N
8 62kΩ, ±5% 4000 N 0.25 500 10 0.5
9 75kΩ, ±5% 2000 N
10 91kΩ, ±5% 4000 N 0.5
11 110kΩ, ±5% 2000 N
12 150kΩ, ±5% 1000 N 0.5 250
13 200kΩ, ±5% 750 N
14 240kΩ, ±5% 1000 N 0.75
15 300kΩ, ±5% 750 N

For all resistor values in Table 8-4, AUTO_HANDOFF is enabled (1b), OPN_CL_HANDOFF_THR is 600Hz, INTEG_ZC_METHOD is disabled (0b), IPD_REPEAT is 3.

Table 8-5 Parameter values on RMP_2 pin for high inertia applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tie to GND 4000 N 0.25 500 15 1
1 4.7kΩ, ±5% 2000 N
2 10kΩ, ±5% 4000 N 0.5
3 15kΩ, ±5% 2000 N
4 22kΩ, ±5% 1000 N 0.5 250
5 30kΩ, ±5% 750 N
6 39kΩ, ±5% 1000 N 0.75
7 51kΩ, ±5% 750 N
8 62kΩ, ±5% 2000 N 0.5 250 20 2.5
9 75kΩ, ±5% 1000 N
10 91kΩ, ±5% 2000 N 0.75
11 110kΩ, ±5% 1000 N
12 150kΩ, ±5% 750 N 1 100
13 200kΩ, ±5% 500 N
14 240kΩ, ±5% 750 N 2
15 300kΩ, ±5% 500 N

For all resistor values in Table 8-5, AUTO_HANDOFF is enabled (1b), OPN_CL_HANDOFF_THR is 600Hz, INTEG_ZC_METHOD is disabled (0b), IPD_REPEAT is 3.

Table 8-6 Parameter values on RMP_2 pin for low acceleration applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tie to GND 2000 N 0.5 250 25 5
1 4.7kΩ, ±5% 1000 Y
2 10kΩ, ±5% 2000 N 0.75
3 15kΩ, ±5% 1000 Y
4 22kΩ, ±5% 750 N 1 100
5 30kΩ, ±5% 500 Y
6 39kΩ, ±5% 750 N 2
7 51kΩ, ±5% 500 Y
8 62kΩ, ±5% 1000 N 0.5 100 50 10
9 75kΩ, ±5% 750 Y
10 91kΩ, ±5% 1000 N 0.75
11 110kΩ, ±5% 750 Y
12 150kΩ, ±5% 500 N 1 75
13 200kΩ, ±5% 300 Y
14 240kΩ, ±5% 500 N 2
15 300kΩ, ±5% 300 Y

For all resistor values in Table 8-6, AUTO_HANDOFF is enabled (1b), OPN_CL_HANDOFF_THR is 600Hz, INTEG_ZC_METHOD is disabled (0b), IPD_REPEAT is 3.

Table 8-7 Parameter values on RMP_2 pin for medium acceleration applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tie to GND 750 N 0.5 100 75 25
1 4.7kΩ, ±5% 500 Y
2 10kΩ, ±5% 750 N 0.75
3 15kΩ, ±5% 500 Y
4 22kΩ, ±5% 300 N 1 75
5 30kΩ, ±5% 200 Y
6 39kΩ, ±5% 300 N 2
7 51kΩ, ±5% 200 Y
8 62kΩ, ±5% 500 N 0.5 75 100 50
9 75kΩ, ±5% 300 Y
10 91kΩ, ±5% 500 N 0.75
11 110kΩ, ±5% 300 Y
12 150kΩ, ±5% 200 N 1 50
13 200kΩ, ±5% 100 Y
14 240kΩ, ±5% 200 N 2
15 300kΩ, ±5% 100 Y

For all resistor values in Table 8-7, AUTO_HANDOFF is enabled (1b), OPN_CL_HANDOFF_THR is 600Hz, INTEG_ZC_METHOD is disabled (0b), IPD_REPEAT is 3.

Table 8-8 Parameter values on RMP_2 pin for high acceleration applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tie to GND 500 N 0.5 75 150 100
1 4.7kΩ, ±5% 300 Y
2 10kΩ, ±5% 500 N 0.75
3 15kΩ, ±5% 300 Y
4 22kΩ, ±5% 200 N 1 50
5 30kΩ, ±5% 100 Y
6 39kΩ, ±5% 200 N 2
7 51kΩ, ±5% 100 Y
8 62kΩ, ±5% 300 N 1 50 200 150
9 75kΩ, ±5% 200 Y
10 91kΩ, ±5% 300 N 2
11 110kΩ, ±5% 200 Y
12 150kΩ, ±5% 100 N 2 25
13 200kΩ, ±5% 75 Y
14 240kΩ, ±5% 100 N 3
15 300kΩ, ±5% 75 Y

For all resistor values in Table 8-8, AUTO_HANDOFF is enabled (1b), OPN_CL_HANDOFF_THR is 600Hz, INTEG_ZC_METHOD is disabled (0b), IPD_REPEAT is 3.

Table 8-9 Parameter values on RMP_2 pin for very high acceleration applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tie to GND 200 N 1 50 250 200
1 4.7kΩ, ±5% 100 Y
2 10kΩ, ±5% 200 N 2
3 15kΩ, ±5% 100 Y
4 22kΩ, ±5% 75 N 3 25
5 30kΩ, ±5% 50 Y
6 39kΩ, ±5% 75 N 5
7 51kΩ, ±5% 50 Y
8 62kΩ, ±5% 100 Y 5 25 500 500
9 75kΩ, ±5% 75 Y
10 91kΩ, ±5% 100 Y 10
11 110kΩ, ±5% 75 Y
12 150kΩ, ±5% 50 Y 10 10
13 200kΩ, ±5% 25 Y
14 240kΩ, ±5% 50 Y 15
15 300kΩ, ±5% 25 Y

For resistor values from (0-51)kΩ in Table 8-9, AUTO_HANDOFF is enabled (1b), OPN_CL_HANDOFF_THR is 600Hz, INTEG_ZC_METHOD is disabled (0b), IPD_REPEAT is 3.

For resistor values from (62-300)kΩ in Table 8-9, AUTO_HANDOFF is disabled (0b), OPN_CL_HANDOFF_THR is 20Hz, INTEG_ZC_METHOD is enabled (1b), IPD_REPEAT is 1.

Table 8-10 Parameter values on RMP_2 pin for ultra-high acceleration applications
Level Resistor value, RMP_2 ALIGN_TIME (ms) DYN_DEGAUSS_EN SLOW_FIRST_CYC_FREQ (Hz) STARTUP_BRK_TIME (ms) CL_ACC (V/s) OL_ACC_A1 (Hz/s)
0 Tie to GND 50 Y 15 10 1000 1000
1 4.7kΩ, ±5% 25 Y
2 10kΩ, ±5% 50 Y 25
3 15kΩ, ±5% 25 Y
4 22kΩ, ±5% 10 Y 25 5
5 30kΩ, ±5% 5 Y
6 39kΩ, ±5% 10 Y 50
7 51kΩ, ±5% 5 Y
8 62kΩ, ±5% 25 Y 25 5 32767 2000
9 75kΩ, ±5% 10 Y
10 91kΩ, ±5% 25 Y 50
11 110kΩ, ±5% 10 Y
12 150kΩ, ±5% 5 Y 75 2
13 200kΩ, ±5% 2 Y
14 240kΩ, ±5% 5 Y 100
15 300kΩ, ±5% 2 Y

For all resistor values in Table 8-10, AUTO_HANDOFF is disabled (0b), OPN_CL_HANDOFF_THR is 20Hz, INTEG_ZC_METHOD is enabled (1b), IPD_REPEAT is 1.

For example, consider the use-case of MTR_STARTUP – Double Align, CL_ACC – 75V/s, STARTUP_BRK_TIME – 75ms, SLOW_FIRST_CYC_FREQ – 1Hz, ALIGN_TIME – 200ms. Here, RMP_1 pin needs a pull-down resistor of 22kΩ to set start-up method to double align and select medium acceleration inertia profile (corresponding to CL_ACC of 75V/s). RMP_2 pin needs a pull-down resistor of 30kΩ to select the required CL_ACC, STARTUP_BRK_TIME, SLOW_FIRST_CYC_FREQ and ALIGN_TIME. Note that the DYN_DEGAUSS_EN is set to enabled (1b) with this RMP_2 resistor value. If DYN_DEGAUSS_EN needs to be disabled (0b), RMP_2 pull-down resistor can be set to 22kΩ, but this will increase the STARTUP_BRK_TIME to 300ms instead. Depending on the parameter that can be set to adjacent values, an optimal resistor setting can be picked from the appropriate table for a given inertia profile.

LDANGLE pin is used to set the lead angle (LD_ANGLE in degrees) as per Table 8-11, if INTEG_ZC_METHOD is set to 0b. If INTEG_ZC_METHOD is set to 1b, LDANGLE is pin is used to configure the BEMF threshold (BEMF_THRESHOLD1 and BEMF_THRESHOLD2) for integration based ZC method for fast start-up as per Table 8-11.

Table 8-11 Resistor values for configuring parameters on LDANGLE pin
Level Resistor value, LDANGLE LD_ANGLE (deg.) BEMF_THRESHOLD1 and BEMF_THRESHOLD2
0 Tie to GND 0 200
1 4.7kΩ, ±5% 2 300
2 10kΩ, ±5% 4 400
3 15kΩ, ±5% 6 500
4 22kΩ, ±5% 8 600
5 30kΩ, ±5% 10 700
6 39kΩ, ±5% 12 800
7 51kΩ, ±5% 14 1000
8 62kΩ, ±5% 16 1200
9 75kΩ, ±5% 18 1400
10 91kΩ, ±5% 20 1600
11 110kΩ, ±5% 22 1800
12 150kΩ, ±5% 24 2100
13 200kΩ, ±5% 26 2400
14 240kΩ, ±5% 28 2700
15 300kΩ, ±5% 30 3000

CONFIG_1 pin is used to set the PWM switching frequency (PWM_FREQ_OUT in kHz), ZC detection blanking time (TBLANK in µs) and IPD clock frequency (IPD_CLK_FREQ in Hz) as per Table 8-12.

Table 8-12 Resistor values for configuring parameters on CONFIG_1 pin
Level Resistor value, CONFIG_1 TBLANK (μs) PWM_FREQ_OUT (kHz) IPD_CLK_FREQ (Hz)
0 Tie to GND 10 10 500
1 4.7kΩ, ±5% 8
2 10kΩ, ±5% 10 20
3 15kΩ, ±5% 8
4 22kΩ, ±5% 8 25 1000
5 30kΩ, ±5% 6
6 39kΩ, ±5% 8 40
7 51kΩ, ±5% 6
8 62kΩ, ±5% 6 50 2000
9 75kΩ, ±5% 4
10 91kΩ, ±5% 6 60
11 110kΩ, ±5% 4
12 150kΩ, ±5% 4 75 5000
13 200kΩ, ±5% 2
14 240kΩ, ±5% 4 100
15 300kΩ, ±5% 2

ILIMIT and SLEW_RATE pins are used to set the cycle-by-cycle (CBC) current limit (ILIMIT in A), CSA_GAIN (in V/A), Open Loop (OL_ILIMIT in A), align (ALIGN_CURR_THR in A) and IPD current limit (IPD_CURR_THR in A) as per Table 8-13 and Table 8-14 . For a given resistor (configuration) value for ILIMIT pin, there are two different values of OL_ILIMIT(ALIGN_CURR_THR and IPD_CURR_THR) that can be chosen(Limit_0 or Limit_1). After choosing between Limit_0 and Limit_1, SLEW_RATE pin pull-down resistor value is selected based on the buck output voltage level (BUCK_SEL, either 3.3V or 5V) and phase output slew rate(SLEW_RATE in V/µs) as per Table 8-14.

Table 8-13 Resistor values for configuring parameters on ILIMIT pin
Level Resistor value, ILIMIT ILIMIT (A) CSA_GAIN (V/A) Open loop, align current, IPD current selection OL_ILIMIT, ALIGN_CURR_THR, IPD_CURR_THR (A)
0 Tie to GND 0.5 1.2 Limit_0 0.25
Limit_1 0.42
1 4.7kΩ, ±5% 1 0.6 Limit_0 0.5
Limit_1 1
2 10kΩ, ±5% 1.33 0.6 Limit_0 0.5
Limit_1 0.83
3 15kΩ, ±5% 2.67 0.3 Limit_0 1
Limit_1 2
4 22kΩ, ±5% 3.33 0.3 Limit_0 1.33
Limit_1 2.67
5 30kΩ, ±5% 4 0.15 Limit_0 2
Limit_1 3.33
6 39kΩ, ±5% 4.67 0.15 Limit_0 2
Limit_1 2.67
7 51kΩ, ±5% 4.67 0.15 Limit_0 3.33
Limit_1 4
8 62kΩ, ±5% 5.33 0.15 Limit_0 2.67
Limit_1 4
9 75kΩ, ±5% 6 0.15 Limit_0 2
Limit_1 2.67
10 91kΩ, ±5% 6 0.15 Limit_0 3.33
Limit_1 4
11 110kΩ, ±5% 6 0.15 Limit_0 4.67
Limit_1 5.33
12 150kΩ, ±5% 7.33 0.15 Limit_0 2.67
Limit_1 3.33
13 200kΩ, ±5% 7.33 0.15 Limit_0 4
Limit_1 4.67
14 240kΩ, ±5% 7.33 0.15 Limit_0 5.33
Limit_1 6
15 300kΩ, ±5% 8 0.15 Limit_0 4
Limit_1 6
Table 8-14 Resistor values for configuring parameters on SLEW_RATE pin
Level Resistor value, SLEW_RATE BUCK_SEL SLEW_RATE (V/μs) Open loop, align current, IPD current selection
0 Tie to GND 3.3V 25 Limit_0
1 4.7kΩ, ±5% Limit_1
2 10kΩ, ±5% 50 Limit_0
3 15kΩ, ±5% Limit_1
4 22kΩ, ±5% 125 Limit_0
5 30kΩ, ±5% Limit_1
6 39kΩ, ±5% 200 Limit_0
7 51kΩ, ±5% Limit_1
8 62kΩ, ±5% 5V 25 Limit_0
9 75kΩ, ±5% Limit_1
10 91kΩ, ±5% 50 Limit_0
11 110kΩ, ±5% Limit_1
12 150kΩ, ±5% 125 Limit_0
13 200kΩ, ±5% Limit_1
14 240kΩ, ±5% 200 Limit_0
15 300kΩ, ±5% Limit_1

For example, consider the use-case of ILIMIT – 4.67A, OL_ILIMIT – 3.33A, BUCK_SEL – 3.3V, SLEW_RATE – 125V/µs. From Table 8-13, ILIMIT pin needs a pull-down resistor of 51kΩ, whereas OL_ILIMIT selection is Limit_0. So, SLEW_RATE pin needs a pull-down resistor of 22kΩ, from Table 8-14.

Similarly, consider the use-case of ILIMIT – 7.33A, OL_ILIMIT – 4.67A, BUCK_SEL – 5V, SLEW_RATE – 25V/µs. Here, ILIMIT pin needs a pull-down resistor of 200kΩ, whereas OL_ILIMIT selection is Limit_1 from Table 8-13. So, SLEW_RATE pin needs a pull-down resistor of 75kΩ from Table 8-14.

CONFIG_2 pin is used to set the OCP level (OCP_LVL as either 10 or 15A) and mode (OCP_MODE as either latched or retry after 500ms), Active Asynchronous Rectification (AAR) enable (EN_AAR) and delay compensation enable (DELAY_COMP_EN) as per Table 8-15.

Table 8-15 Resistor values for configuring parameters on CONFIG_2 pin
Level Resistor value, CONFIG_2 OCP_LVL (A) DELAY_COMP_EN EN_AAR OCP_MODE
0 Tie to GND 10 Disable Disable Latched
1 4.7kΩ, ±5% 15
2 10kΩ, ±5% 10 Enable
3 15kΩ, ±5% 15
4 22kΩ, ±5% 10 Disable Enable
5 30kΩ, ±5% 15
6 39kΩ, ±5% 10 Enable
7 51kΩ, ±5% 15
8 62kΩ, ±5% 10 Disable Disable Retry after 500ms
9 75kΩ, ±5% 15
10 91kΩ, ±5% 10 Enable
11 110kΩ, ±5% 15
12 150kΩ, ±5% 10 Disable Enable
13 200kΩ, ±5% 15
14 240kΩ, ±5% 10 Enable
15 300kΩ, ±5% 15

CONFIG_3 is used to set the abnormal speed threshold (LOCK_ABN_SPEED in Hz) and minimum duty cycle (MIN_DUTY in %) as per Table 8-16.

Table 8-16 Resistor values for configuring parameters on CONFIG_3 pin
Level Resistor value, CONFIG_3 MIN_DUTY (%) ABN_SPEED (Hz)
0 Tie to GND 2.5 1000
1 4.7kΩ, ±5% 5
2 10kΩ, ±5% 7.5
3 15kΩ, ±5% 10
4 22kΩ, ±5% 2.5 2000
5 30kΩ, ±5% 5
6 39kΩ, ±5% 7.5
7 51kΩ, ±5% 10
8 62kΩ, ±5% 2.5 3000
9 75kΩ, ±5% 5
10 91kΩ, ±5% 7.5
11 110kΩ, ±5% 10
12 150kΩ, ±5% 2.5 4000
13 200kΩ, ±5% 5
14 240kΩ, ±5% 7.5
15 300kΩ, ±5% 10