SBOS350B December   2006  – December 2024 OPA4830

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics VS = ±5V
    6. 6.6  Electrical Characteristics VS = 5V
    7. 6.7  Electrical Characteristics VS = 3V
    8. 6.8  Typical Characteristics: VS = ±5V
    9. 6.9  Typical Characteristics: VS = ±5V, Differential Configuration
    10. 6.10 Typical Characteristics: VS = 5V
    11. 6.11 Typical Characteristics: VS = 5V, Differential Configuration
    12. 6.12 Typical Characteristics: VS = 3V
    13. 6.13 Typical Characteristics: VS = 3V, Differential Configuration
  8. 7 Parameter Measurement Information
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Wideband Voltage-Feedback Operation
      2. 8.1.2  DC Level-Shifting
      3. 8.1.3  AC-Coupled Output Video Line Driver
      4. 8.1.4  Noninverting Amplifier With Reduced Peaking
      5. 8.1.5  Single-Supply Active Filter
      6. 8.1.6  Differential Interface Applications
      7. 8.1.7  DC-Coupled Single-to-Differential Conversion
      8. 8.1.8  Low-Power, Differential I/O, 4th-Order Active Filter
      9. 8.1.9  Dual-Channel, Differential ADC Driver
      10. 8.1.10 Video Line Driving
      11. 8.1.11 4-Channel DAC Transimpedance Amplifier
      12. 8.1.12 Operating Suggestions: Optimizing Resistor Values
      13. 8.1.13 Bandwidth vs Gain: Noninverting Operation
      14. 8.1.14 Inverting Amplifier Operation
      15. 8.1.15 Output Current and Voltages
      16. 8.1.16 Driving Capacitive Loads
      17. 8.1.17 Distortion Performance
      18. 8.1.18 Noise Performance
      19. 8.1.19 DC Accuracy and Offset Control
    2. 8.2 Power Supply Recommendations
      1. 8.2.1 Thermal Analysis
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
        1. 8.3.1.1 Input and ESD Protection
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Design-In Tools
        1. 9.1.1.1 Demonstration Fixtures
        2. 9.1.1.2 Macromodels and Applications Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.2 DC Level-Shifting

Figure 8-4 shows a DC-coupled noninverting amplifier that level-shifts the input up to accommodate the desired output voltage range. Given the desired signal gain (G), and the amount VOUT needs to be shifted up (ΔVOUT) when VIN is at the center of the range, Equation 1 and Equation 2 give the resistor values that produce the desired performance. Assume that R4 is between 200Ω and 1.5kΩ.

Equation 1. OPA4830

where:

Equation 2. OPA4830

Make sure that VIN and VOUT stay within the specified input and output voltage ranges.

OPA4830 DC Level-Shifting Figure 8-4 DC Level-Shifting

The front-page circuit is a good example of this type of application. The device was designed to take VIN between 0V and 0.5V and produce VOUT between 1V and 2V when using a +3V supply. This output means G = 2.00, and ΔVOUT = 1.50V – G × 0.25V = 1.00V. Plugging these values into Equation 1 and Equation 2 (with R4 = 750Ω) gives: NG = 2.33, R1 = 375Ω, R2 = 2.25kΩ, and R3 = 563Ω. The resistors were changed to the nearest standard values for the front-page circuit.