SBOS350B December 2006 – December 2024 OPA4830
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Where a low-noise, single-supply, interface to a differential input +5V ADC is required, the circuit of Figure 8-14 can provide a high dynamic range, medium gain interface for dual high-performance ADCs. The circuit of Figure 8-14 uses two amplifiers in the differential inverting configuration. The common-mode voltage is set on the noninverting inputs to the supply mid-scale. In this example, the input signal is coupled in through a 1:2 transformer. This design provides both signal gain, single to differential conversion, and a reduction in noise figure. To show a 50Ω input impedance at the input to the transformer, two 200Ω resistors are required on the transformer secondary. These two resistors are also the amplifier gain elements. Because the same dc voltage appears on both inverting nodes in the circuit of Figure 8-14, no dc current flows through the transformer, giving a dc gain of 1 to the output for this common-mode voltage, VCM.
The circuit of Figure 8-14 is particularly designed for a moderate resolution dual ADC used as I/Q samplers. The optional 500Ω resistors to ground on each amplifier output can be added to improve the 2nd- and 3rd-harmonic distortion by >15dB if higher dynamic range is required.
The 5mA added output stage current significantly improves linearity if that is required. The measured 2nd-harmonic distortion is consistently lower than the 3rd-harmonics for this balanced differential design. Particularly helpful for this low-power design if there are no grounds in the signal path after the low-level signal at the transformer input. The two pull-down resistors do show a signal path ground and can be connected at the same physical point to ground, to eliminate imbalanced ground return currents from degrading 2nd-harmonic distortion.