All of the familiar op amp application circuits are available with the OPA4830 to the designer. See Figure 8-17 for a typical inverting configuration where the I/O impedance and signal gain from Figure 8-1 are retained in an inverting circuit configuration. Inverting operation is one of the more common requirements and offers several performance benefits. This also allows the input to be biased at V_S/2 without any headroom issues. The output voltage can be independently moved to be within the output voltage range with coupling capacitors, or bias adjustment resistors.

Figure 8-17 AC-Coupled, G = –2V/V Example Circuit

In the inverting configuration, three key design considerations must be noted. The first consideration is that the gain resistor (R_G) becomes part of the signal channel input impedance. If input impedance matching is desired (which is beneficial whenever the signal is coupled through a cable, twisted pair, long PCB trace, or other transmission line conductor), R_Gcan be set equal to the required termination value and R_F adjusted to give the desired gain. This approach is the simplest and results in optimum bandwidth and noise performance.

However, at low inverting gains, the resulting feedback resistor value can present a significant load to the amplifier output. For an inverting gain of 2, setting R_G to 50Ω for input matching eliminates the need for R_M but requires a 100Ω feedback resistor. This configuration has the interesting advantage of the noise gain becoming equal to 2 for a 50Ω source impedance—the same as the noninverting circuits considered above. The amplifier output now sees the 100Ω feedback resistor in parallel with the external load. In general, the feedback resistor is limited to the 200Ω to 1.5kΩ range. In this case, preferable to increase both the R_F and R_G values, as shown in Figure 8-17, and then achieve the input matching impedance with a third resistor (R_M) to ground. The total input impedance becomes the parallel combination of R_G and R_M.

The second major consideration, touched on in the previous paragraph, is that the signal source impedance becomes part of the noise gain equation and thus influences the bandwidth. For the example in Figure 8-17, the R_M value combines in parallel with the external 50Ω source impedance (at high frequencies), yielding an effective driving impedance of 50Ω || 57.6Ω = 26.8Ω. This impedance is added in series with R_G for calculating the noise gain. The resulting noise gain is 2.87 for Figure 8-17, as opposed to only 2 if R_M can be eliminated as discussed above. The bandwidth is therefore lower for the gain of –2 circuit of Figure 8-17 (NG = +2.87) than for the gain of +2 circuit of Figure 8-1.

The third important consideration in inverting amplifier design is setting the bias current cancellation resistors on the noninverting input (a parallel combination of R_T = 750Ω). If this resistor is set equal to the total dc resistance looking out of the inverting node, the output dc error (as a result of the input bias currents) is reduced to (input offset current) times R_F. With the dc blocking capacitor in series with R_G, the dc source impedance looking out of the inverting mode is simply R_F = 750Ω for Figure 8-17. To reduce the additional high-frequency noise introduced by this resistor and power-supply feed-through, R_T is bypassed with a capacitor.