Brownout Prevention (BOP) feature provides a priority input to a dedicated limiter to generate a fast response to transient dips in the supply voltage at the end of charge conditions that can cause system level brownout. When supply voltage dips below the BOP threshold, the limiter begins reducing gain at a configurable attack rate. When supply voltage rises above the BOP threshold, the limiter will begin to release after a programmed hold time. The BOP feature can be enabled by setting the BOP_EN register bit high. The brownout supply source can be set using BOP_SRC register bit to either PVDD (BOP_SRC =1) or VBAT1S (BOP_SRC =0) depending on application need. It should be noted that the BOP feature is independent of the limiter and will function, if enabled, even if the Supply Tracking Limiter is disabled.

The BOP can be configured to attack the gain through four levels as the supply voltage continues to drop. The BOP threshold Level 3 is set using the BOP_TH3[7:0] register bits followed by threshold Level 2 using BOP_TH2[7:0] register bits, Level 1 threshold set by BOP_TH1[7:0] bits and finally crossing Level 0 set by BOP_TH0[7:0] register bits.

The BOP level that is not used can be disabled individually (register bits BOP_DIS0, BOP_DIS1, BOP_DIS2, BOP_DIS3) providing flexibility from one to four levels. For proper operation levels should be disabled in order, starting with Level 3.

Each level has a separate attack rate (register bits BOP_ATK_RT0[2:0] to BOP_ATK_RT3[2:0]), attack step size (register bits BOP_ATK_ST0[3:0] to BOP_ATK_ST3[3:0]), release rate (register bits BOP_RLS_RT0[2:0] to BOP_RLS_RT3[2:0]), release step size (register bits BOP_RLS_ST0[3:0] to BOP_RLS_ST3[3:0]), dwell time (register bits BOP_DT0[2:0] to BOP_DT3[2:0]), hold time (register bits BOP_HT0[2:0] to BOP_HT3[2:0]), maximum attenuation (BOP_MAX_ATTN0[4:0] to BOP_MAX_ATTN3[4:0]).

For proper device operation the following conditions must be met:

● BOP_MAX_ATTN0 > BOP_MAX_ATTN1 > BOP_MAX_ATTN2 > BOP_MAX_ATTN3

● BOP_TH Level 3 > BOP_TH Level 2 > BOP_TH Level 1 > BOP_TH Level 0.

Use bits BOP_MAX_ATTN of registers BOP_CFG4, BOP_CFG9, BOP_CFG14, BOP_CFG20 to program attenuation levels. Registers BOP_CFG5, BOP_CFG10, BOP_CFG15, BOP_CFG21 will be used for setting the BOP threshold levels.

The TAS2780 can also immediately mute and then shutdown the device when a BOP event occurs by reaching Level 0 if the BOP_SHDN register bit is set high. For the device to continue playing audio again it must transition through a Software/Hardware Shutdown state. If the hold time set by BOP_HT0÷4[2:0] register bits is at 7h (Infinite) the device needs to transition through a Mute or Software/Hardware Shutdown state, or the register bit BOP_HLD_CLR can be set to high causing the device to exit the hold state and begin releasing. This bit is self clearing and will always read-back low.

Figure 8-9 Brownout Prevention Event

The TAS2780 BOP engine will keep track of the current level state, the lowest BOP level that has been engaged and the lowest measued BOP supply voltage. This information is continuously updated until requested. To access this information the register BOP_STAT_HLD should be set high. This will pause the updates of the current state (BOP_STAT_STATE[3:0]) and lowest BOP level (BOP_STAT_LLVL[2:0]) registers bits allowing them to be read back. Once the read is complete the register bit BOP_STAT_HLD should be set low again clearing the current BOP status registers and re-enabling the updates based on current BOP state.

The lowest PVDD measurement since the last read is available in the register bits BOP_STAT_PVDD[9:0] if BOP_STAT_HLD register bit is set high before reading.

A hold condition (infinite or not) for a higher BOP level will not be reached if the supply ramps up faster than the lower levels release. Specifically, whether the infinite hold for a level is reached or not, it depends on the release rates of the lower levels, so even if infinite hold is set, it might not be reached.