SNLS697A April 2021 – February 2023 TDES954
PRODUCTION DATA
RX port specific register. The V3Link Port Select register 0x4C configures which unique RX port registers can be accessed by I2C read and write commands.
It is recommended to set bit four in the V3Link capabilities register to one in order to flag errors detected from enhanced CRC on V3Link encoded link control information. The V3Link Encoder CRC must also be enabled by setting the V3LINK_ENC_CRC_DIS (register 0xBA[7]) to 0.
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7:5 | RESERVED | R/W | 0x0 | Reserved |
4 | V3LINK_ENC_CRC_CAP | R/W | 0x0 | 0: Disable CRC error flag from V3Link encoder 1: Enable CRC error flag from V3Link encoder (recommended) |
3:0 | RESERVED | R/W | 0x0 | Reserved |