SLOS080W September   1978  – July 2025 TL071 , TL071A , TL071B , TL071H , TL072 , TL072A , TL072B , TL072H , TL072M , TL074 , TL074A , TL074B , TL074H , TL074M

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information for Single Channel
    5. 5.5  Thermal Information for Dual Channel
    6. 5.6  Thermal Information for Quad Channel
    7. 5.7  Electrical Characteristics for TL07xH
    8. 5.8  Electrical Characteristics (DC) for TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    9. 5.9  Electrical Characteristics (AC) for TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    10. 5.10 Typical Characteristics: TL07xH
    11. 5.11 Typical Characteristics: All Devices Except TL07xH
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Total Harmonic Distortion
      2. 7.3.2 Slew Rate
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Inverting Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.10 Typical Characteristics: TL07xH

at TA = 25°C, VS = 40 V ( ±20 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 20 pF (unless otherwise noted)

TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Offset Voltage Production Distribution
TA = 25°C
Figure 5-1 Offset Voltage Production Distribution
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Offset Voltage vs Temperature
VCM = VS / 2
Figure 5-3 Offset Voltage vs Temperature
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Offset Voltage vs Common-Mode Voltage
TA = 125°C
Figure 5-5 Offset Voltage vs Common-Mode Voltage
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Offset Voltage vs Power Supply
 
Figure 5-7 Offset Voltage vs Power Supply
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Closed-Loop Gain vs Frequency
 
Figure 5-9 Closed-Loop Gain vs Frequency
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Input Bias Current vs Temperature
 
Figure 5-11 Input Bias Current vs Temperature
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Output Voltage Swing vs Output Current (Sinking)
 
Figure 5-13 Output Voltage Swing vs Output Current (Sinking)
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M CMRR vs Temperature (dB)
f = 0 Hz
Figure 5-15 CMRR vs Temperature (dB)
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M 0.1-Hz to 10-Hz Noise
 
Figure 5-17 0.1-Hz to 10-Hz Noise
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Quiescent Current vs Supply Voltage
VCM = VS / 2
Figure 5-19 Quiescent Current vs Supply Voltage
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Open-Loop Voltage Gain vs Temperature
 
Figure 5-21 Open-Loop Voltage Gain vs Temperature
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Small-Signal Overshoot vs Capacitive Load
G = –1, 25-mV output step
Figure 5-23 Small-Signal Overshoot vs Capacitive Load
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Phase Margin vs Capacitive Load
 
Figure 5-25 Phase Margin vs Capacitive Load
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Positive Overload Recovery
G = –10
Figure 5-27 Positive Overload Recovery
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Small-Signal Step Response, Rising
CL = 20 pF, G = 1, 10-mV step response
Figure 5-29 Small-Signal Step Response, Rising
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Large-Signal Step Response (Rising)
CL = 20 pF, G = 1
Figure 5-31 Large-Signal Step Response (Rising)
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Large-Signal Step Response
CL = 20 pF, G = 1
Figure 5-33 Large-Signal Step Response
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Maximum Output Voltage vs Frequency
 
Figure 5-35 Maximum Output Voltage vs Frequency
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M EMIRR (Electromagnetic Interference Rejection Ratio) vs Frequency
 
Figure 5-37 EMIRR (Electromagnetic Interference Rejection Ratio) vs Frequency
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Offset Voltage Drift Distribution
 
Figure 5-2 Offset Voltage Drift Distribution
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Offset Voltage vs Common-Mode Voltage
TA = 25°C
Figure 5-4 Offset Voltage vs Common-Mode Voltage
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Offset Voltage vs Common-Mode Voltage
TA = –40°C
Figure 5-6 Offset Voltage vs Common-Mode Voltage
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Open-Loop Gain and Phase vs Frequency
 
Figure 5-8 Open-Loop Gain and Phase vs Frequency
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Input Bias Current vs Common-Mode Voltage
 
Figure 5-10 Input Bias Current vs Common-Mode Voltage
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Output Voltage Swing vs Output Current (Sourcing)
 
Figure 5-12 Output Voltage Swing vs Output Current (Sourcing)
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M CMRR and PSRR vs Frequency
 
Figure 5-14 CMRR and PSRR vs Frequency
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M PSRR vs Temperature (dB)
f = 0 Hz
Figure 5-16 PSRR vs Temperature (dB)
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Input Voltage Noise Spectral Density vs Frequency
 
Figure 5-18 Input Voltage Noise Spectral Density vs Frequency
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Quiescent Current vs Temperature
 
Figure 5-20 Quiescent Current vs Temperature
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Open-Loop Output Impedance vs Frequency
 
Figure 5-22 Open-Loop Output Impedance vs Frequency
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Small-Signal Overshoot vs Capacitive Load
G = 1, 10-mV output step
Figure 5-24 Small-Signal Overshoot vs Capacitive Load
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M No Phase Reversal
VS = ±10 V, VIN = VOUT
Figure 5-26 No Phase Reversal
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Negative Overload Recovery
G = –10
Figure 5-28 Negative Overload Recovery
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Small-Signal Step Response, Falling
CL = 20 pF, G = 1, 10-mV step response
Figure 5-30 Small-Signal Step Response, Falling
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Large-Signal Step Response (Falling)
CL = 20 pF, G = 1
Figure 5-32 Large-Signal Step Response (Falling)
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Short-Circuit Current vs Temperature
   
Figure 5-34 Short-Circuit Current vs Temperature
TL071 TL071A TL071B TL071H TL072 TL072A TL072B TL072H TL072M TL074 TL074A TL074B TL074H TL074M Channel Separation vs Frequency
 
Figure 5-36 Channel Separation vs Frequency