SLOS080W September   1978  – July 2025 TL071 , TL071A , TL071B , TL071H , TL072 , TL072A , TL072B , TL072H , TL072M , TL074 , TL074A , TL074B , TL074H , TL074M

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information for Single Channel
    5. 5.5  Thermal Information for Dual Channel
    6. 5.6  Thermal Information for Quad Channel
    7. 5.7  Electrical Characteristics for TL07xH
    8. 5.8  Electrical Characteristics (DC) for TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    9. 5.9  Electrical Characteristics (AC) for TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM
    10. 5.10 Typical Characteristics: TL07xH
    11. 5.11 Typical Characteristics: All Devices Except TL07xH
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Total Harmonic Distortion
      2. 7.3.2 Slew Rate
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Inverting Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Electrical Characteristics (DC) for TL07xC, TL07xAC, TL07xBC, TL07xI, TL07xM

at VS = (VCC+) – (VCC–) = ±15 V and TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS(1)(2) MIN TYP MAX UNIT
DC
VOS Input offset voltage
 VO = 0 V
RS = 50 Ω		 TL07xC 3 10 mV
TA = Full range 13
TL07xAC 3 6
TA = Full range 7.5
TL07xBC 2 3
TA = Full range 5
TL07xI 3 6
TA = Full range 8
TL071M, TL072M 3 6
TA = Full range 9
TL074M 3 9
TA = Full range 15
dVOS/dT Input offset voltage drift VO = 0 V, RS = 50 Ω TA = Full range ±18 µV/℃
IOS Input offset current  VO = 0 V TL07xC 5 100 pA
TA = Full range 10 nA
TL07xAC, TL07xBC, TL07xI 5 100 pA
TA = Full range 2 nA
TL07xM 5 100 pA
TA = Full range 20 nA
IB Input bias current  VO = 0 V TL07xC, TL07xAC,
TL07xBC, TL07xI		 65 200 pA
TA = Full range 7 nA
TL071M, TL072M 65 200 pA
TA = Full range 50 nA
TL074M 65 200 pA
TA = Full range 20 nA
VCM Common-mode voltage ±11 –12 to 15 V
VOM Maximum peak output voltage swing RL = 10 kΩ ±12 ±13.5 V
RL ≥ 10 kΩ TA = Full range ±12
RL ≥ 2 kΩ ±10
AOL Open-loop voltage gain VO = 0 V TL07xC 25 200 V/mV
TA = Full range 15
TL07xAC, TL07xBC, TL07xI 50 200
TA = Full range 25
TL07xM 35 200
TA = Full range 15
GBW Gain-bandwidth product All NS and PS packages; All TL07xM devices 3 MHz
All other devices  5.25
RID Common-mode input resistance 1 TΩ
CMRR Common-mode rejection ratio VIC = VICR(min)
VO = 0 V
RS = 50 Ω		 TL07xC 70 100 dB
TL07xAC, TL07xBC, TL07xI 75 100
TL07xM 80 86
PSRR Input offset voltage versus power supply VS = ±9 V to ± 18 V
VO = 0 V
RS = 50 Ω		 TL07xC 70 100 dB
TL07xAC, TL07xBC, TL07xI 80 100
TL07xM 80 86
IQ Quiescent current per amplifier VO = 0 V, no load 1.4 2.5 mA
Channel separation f = 0 Hz 1 µV/V
(1) All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified.
(2) Full range is TA = 0°C to 70°C for the TL07xC, TL07xAC, and TL07xBC; TA = –40°C to +85°C for the TL07xI; and TA = –55°C to +125°C for the TL07xM.