SLVSIM2A June   2025  – August 2025 TPD4S480-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings—JEDEC Specification
    3. 5.3 ESD Ratings—IEC Specification
    4. 5.4 ESD Ratings—ISO Specification
    5. 5.5 Recommended Operating Conditions
    6. 5.6 Thermal Information
    7. 5.7 Electrical Characteristics
    8. 5.8 Timing Requirements
    9. 5.9 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 4-Channels of Short-to-VBUS Overvoltage Protection (CC1, CC2, SBU1, SBU2 Pins or CC1, CC2, DP, DM Pins): 63VDC Tolerant
      2. 6.3.2 4-Channels of IEC 61000-4-2 ESD Protection (CC1, CC2, SBU1, SBU2 Pins)
      3. 6.3.3 CC1, CC2 Overvoltage Protection FETs 600-mA Capable for Passing VCONN Power
      4. 6.3.4 CC Dead Battery Resistors Integrated for Handling the Dead Battery Use Case in Mobile Devices
      5. 6.3.5 EPR Adapter
        1. 6.3.5.1 VBUS Divider
        2. 6.3.5.2 EPR Blocking FET Gate Driver
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
    3. 7.3 Design Requirements
      1. 7.3.1 EPR Design Requirements
    4. 7.4 Detailed Design Procedure
      1. 7.4.1 VBIAS Capacitor Selection
      2. 7.4.2 CC Line Capacitance
      3. 7.4.3 FLT Pin Operation
      4. 7.4.4 Dead Battery Operation
    5. 7.5 Application Curves
    6. 7.6 Power Supply Recommendations
    7. 7.7 Layout
      1. 7.7.1 Layout Guidelines
      2. 7.7.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4-Channels of IEC 61000-4-2 ESD Protection (CC1, CC2, SBU1, SBU2 Pins)

The TPD4S480-Q1 integrates 4-Channels of IEC 61000-4-2 system level ESD protection for the CC1, CC2, SBU1, and SBU2 pins. USB Type-C ports on end-products need system level IEC ESD protection in order to provide adequate protection for the ESD events that the connector can be exposed to from end users. The TPD4S480-Q1 integrates IEC ESD protection for all of the low-speed pins on the USB Type-C connector in a single chip. Also note, that while the RPD_Gx pins are not individually rated for IEC ESD, when they are shorted to the C_CCx pins, the C_CCx pins provide protection for both the C_CCx pins and the RPD_Gx pins. Additionally, high-voltage IEC ESD protection that is 63V DC tolerant is required for the CC and SBU lines in order to simultaneously support IEC ESD and Short-to-VBUS protection; there are not many discrete market solutions that can provide this kind of protection. The TPD4S480-Q1 integrates this type of high-voltage ESD protection so a system designer can meet both IEC ESD and Short-to-VBUS protection requirements in a single device.