SLVSET9G September   2018  – April 2026 TPS1663

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Hot Plug-In and In-Rush Current Control
        1. 8.3.1.1 Thermal Regulation Loop
      2. 8.3.2  Undervoltage Lockout (UVLO)
      3. 8.3.3  Overvoltage Protection (OVP)
      4. 8.3.4  Overload and Short Circuit Protection
        1. 8.3.4.1 Overload Protection
        2. 8.3.4.2 Short Circuit Protection
          1. 8.3.4.2.1 Start-Up With Short-Circuit On Output
      5. 8.3.5  Output Power Limiting, PLIM (TPS16632 and TPS16637)
      6. 8.3.6  Current Monitoring Output (IMON)
      7. 8.3.7  FAULT Response (FLT)
      8. 8.3.8  Power Good Output (PGOOD)
      9. 8.3.9  IN, P_IN, OUT and GND Pins
      10. 8.3.10 Thermal Shutdown
      11. 8.3.11 Low Current Shutdown Control (SHDN)
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming the Current-Limit Threshold R(ILIM) Selection
        2. 9.2.2.2 Undervoltage Lockout and Overvoltage Set Point
        3. 9.2.2.3 Setting Output Voltage Ramp Time (tdVdT)
          1. 9.2.2.3.1 Support Component Selections RPGOOD and C(IN)
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Simple 24V Power Supply Path Protection
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Transient Protection
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.2 Undervoltage Lockout and Overvoltage Set Point

The undervoltage lockout (UVLO) and overvoltage trip point are adjusted using an external voltage divider network of R1, R2 and R3 connected between IN, UVLO, OVP and GND pins of the device. The values required for setting the undervoltage and overvoltage are calculated by solving Equation 11 and Equation 12.

Equation 11. V O V P R = R 3 R 1 + R 2 + R 3 × V O V
Equation 12. V U V L O R = R 2 + R 3 R 1 + R 2 + R 3 × V U V

For minimizing the input current drawn from the power supply:

Equation 13. IR123=VINR1+R2+R3

TI recommends to use higher value resistance for R1, R2 and R3.

However, the leakage current due to external active components connected at resistor string can add error to these calculations. So, the resistor string current, I(R123), must be chosen to be 20 times greater than the leakage current of UVLO and OVP pins.

From the device electrical specifications, V(OVPR) = 1.2V and V(UVLOR) = 1.2V. From the design requirements, V(OV) is 55V and V(UV) is 18V. To solve the equation, first select the value of R3 = 20.5kΩ and use Equation 11 to solve for (R1 + R2) = 930kΩ. Use Equation 12 and value of (R1 + R2) to solve for R2 = 43kΩ and finally R1 = 887kΩ.

select the closest standard 1% resistor values: R1 = 887kΩ, R2 = 43kΩ, and R3 = 20.5kΩ.