SLVSET9G September   2018  – April 2026 TPS1663

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Hot Plug-In and In-Rush Current Control
        1. 8.3.1.1 Thermal Regulation Loop
      2. 8.3.2  Undervoltage Lockout (UVLO)
      3. 8.3.3  Overvoltage Protection (OVP)
      4. 8.3.4  Overload and Short Circuit Protection
        1. 8.3.4.1 Overload Protection
        2. 8.3.4.2 Short Circuit Protection
          1. 8.3.4.2.1 Start-Up With Short-Circuit On Output
      5. 8.3.5  Output Power Limiting, PLIM (TPS16632 and TPS16637)
      6. 8.3.6  Current Monitoring Output (IMON)
      7. 8.3.7  FAULT Response (FLT)
      8. 8.3.8  Power Good Output (PGOOD)
      9. 8.3.9  IN, P_IN, OUT and GND Pins
      10. 8.3.10 Thermal Shutdown
      11. 8.3.11 Low Current Shutdown Control (SHDN)
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming the Current-Limit Threshold R(ILIM) Selection
        2. 9.2.2.2 Undervoltage Lockout and Overvoltage Set Point
        3. 9.2.2.3 Setting Output Voltage Ramp Time (tdVdT)
          1. 9.2.2.3.1 Support Component Selections RPGOOD and C(IN)
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Simple 24V Power Supply Path Protection
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Transient Protection
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

–40°C ≤ TA = TJ ≤ +125°C, 4.5V < V(IN) = V(P_IN) < 60V, V(SHDN) = 2V, R(ILIM) = 30kΩ, IMON = PGOOD = FLT = OPEN, C(OUT) = 1μF, C(dVdT) = OPEN. (All voltages referenced to GND, (unless otherwise noted))
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
V(IN), V(P_IN) Operating input voltage 4.5 60 V
IQ(ON) Supply current Enabled: V(SHDN) = 2V 1.38 1.7 mA
IQ(OFF) V(SHDN) = 0V 21 60 µA
V(OVC) Over voltage clamp TPS16632 Only, V(IN) > 40V, I(OUT) = 1mA 35.7 36.6 39 V
UNDERVOLTAGE LOCKOUT (UVLO) INPUT
V(UVLOR) UVLO threshold voltage, rising 1.176 1.2 1.224 V
V(UVLOF) UVLO threshold voltage, falling 1.09 1.122 1.15 V
I(UVLO) UVLO Input leakage current 0V ≤ V(UVLO) ≤ 60V –150 8 150 nA
OVERVOLTAGE PROTECTION (OVP) INPUT
V(OVPR) over-voltage threshold voltage, rising 1.176 1.2 1.224 V
V(OVPF) over-voltage threshold voltage, falling 1.09 1.122 1.15 V
I(OVP) OVP Input leakage current 0V ≤ V(OVP) ≤ 4V –150 0 150 nA
CURRENT LIMIT PROGRAMMING (ILIM)
I(OL) Over Load current limit R(ILIM) = 30kΩ, V(IN) – V(OUT) = 1V 0.54 0.6 0.66 A
R(ILIM) = 9kΩ, V(IN) –  V(OUT) = 1V 1.84 2 2.16 A
R(ILIM) = 4.02kΩ, V(IN) – V(OUT) = 1V 4.185 4.5 4.815 A
R(ILIM) = 3kΩ, V(IN) – V(OUT) = 1V 5.58 6 6.42 A
I(FASTRIP) Fast-trip comparator threshold 2xI(OL) A
I(SCP) Short Circuit Protect current 45 A
OUTPUT POWER LIMITING CONTROL (PLIM) INPUT – TPS16632 and TPS16637 ONLY
V(SEL_PLIM) Power Limit Feature select threshold 180 210 240 mV
I(PLIM) PLIM sourcing current V(PLIM) = 0V 4.4 5.02 5.6 µA
P(PLIM) Max Output power R(PLIM) = 100kΩ 94 100 106 W
R(PLIM) = 150kΩ  (1) 141.9 151 160.1 W
P(PLIM) Max Output power R(PLIM) = 100kΩ, VIN = 54V, TPS16637 100 W
PASS FET OUTPUT (OUT)
RON IN to OUT total ON resistance 0.6A ≤ I(OUT) ≤ 6A,TJ = 25°C 26 30.44 34.5 mΩ
RON IN to OUT total ON resistance 0.6A ≤ I(OUT) ≤ 6A,TJ = 85°C 33 45 mΩ
RON IN to OUT total ON resistance 0.6A ≤ I(OUT) ≤ 6A, –40°C ≤ TJ ≤ +125°C 19 30.44 53 mΩ
OUTPUT RAMP CONTROL (dVdT)
I(dVdT) dVdT charging current V(dVdT) = 0V 1.775 2 2.225 µA
GAIN(dVdT) dVdT to OUT gain V(OUT) /V(dVdT) 23.5 25 26 V/V
V(dVdTmax) dVdT maximum capacitor voltage 3.8 4.17 4.75 V
R(dVdT) dVdT discharging resistance 10 16.6 26.6 Ω
CURRENT MONITOR OUTPUT (IMON)
GAIN(IMON) Gain factor I(IMON):I(OUT) 0.6A ≤ I(OUT) < 2A 25.66 27.9 30.14 µA/A
2A ≤ I(OUT) ≤ 6A 26.22 27.9 29.58 µA/A
LOW IQ SHUTDOWN (SHDN) INPUT
V(SHDN) Open circuit voltage I(SHDN) = 0.1 µA 2.48 2.7 3.3 V
V(SHUTF) SHDN threshold voltage for low IQ shutdown, falling 0.8 V
V(SHUTR) SHDN threshold rising 2 V
I(SHDN) Leakage current V(SHDN) = 0V –10 µA
FAULT FLAG (FLT): ACTIVE LOW
R(FLT) FLT Pull-down resistance 36 70 130 Ω
I(FLT) FLT Input leakage current 0V ≤ V(FLT) ≤ 60V –150 6 150 nA
POWER GOOD (PGOOD)
R(PGOOD) PGOOD Pull-down resistance 36 70 130 Ω
I(PGOOD) PGOOD Input leakage current 0V ≤ V(PGOOD) ≤ 60V –150 6 150 nA
THERMAL PROTECTION
T(J_REG) Thermal regulation set point 136 145 154 ºC
T(TSD) Thermal shutdown (TSD) threshold, rising 165 ºC
T(TSDhyst) TSD hysteresis 11 ºC
MODE
MODE_SEL Mode selection MODE = Open Latch
MODE = Short to GND Auto – Retry
(1) Parameter guaranteed by design and characterization, not tested in production