SBOSAL6A June   2025  – September 2025 XTR200

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Explanation of Pin Functions
      2. 6.3.2 Using an External Transistor
      3. 6.3.3 Error Flag
    4. 6.4 Device Functional Modes
      1. 6.4.1 Current-Output Mode
      2. 6.4.2 Voltage-Output Mode
      3. 6.4.3 Output Disabled
      4. 6.4.4 Thermal Shutdown
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input Voltage
      2. 7.1.2 Miswiring Protection
      3. 7.1.3 Power Dissipation in Current Output Mode
      4. 7.1.4 Estimating Junction Temperature
    2. 7.2 Typical Applications
      1. 7.2.1 Analog Output Circuit for Field Transmitters
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Additional Applications
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1.     53
    2. 10.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4.3 Output Disabled

Applying a voltage greater than 1.65V above ground to the OD pin disables the output of the XTR200. Power supply voltages less than 7.4V also disable the output of the device.Figure 6-5 shows the internal configuration of the XTR200 with the output disabled. In this mode, the gate of the internal output PMOS transistor, Q2, is shorted to the source through an internal switch to make the OUT pin high impedance. The gate of the internal NMOS transistor, Q1, is also shorted to ground so that the SET pin is high impedance. The OUT pin is tolerant of voltages less than the power supply voltage in this state.

XTR200 XTR200 Internal Configuration with Output Disabled Figure 6-5 XTR200 Internal Configuration with Output Disabled