JAJSQP4 February 2024 ADS1288
PRODUCTION DATA
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | AIN1P | Analog input | Channel 1 positive input. |
2 | AIN1N | Analog input | Channel 1 negative input. |
3 | AIN2P | Analog input | Channel 2 positive input. |
4 | AIN2N | Analog input | Channel 2 negative input. |
5 | CAPP | Analog internal | PGA positive capacitor. Connect a 10nF C0G capacitor across CAPP and CAPN. |
6 | CAPN | Analog internal | PGA negative capacitor. Connect a 10nF C0G capacitor across CAPP and CAPN. |
7 | CAPBP | Analog internal | Buffer positive capacitor. Connect a 47nF C0G capacitor to AVSS. |
8 | CAPBN | Analog internal | Buffer negative capacitor. Connect a 47nF C0G capacitor to AVSS. |
9 | CAPC | Analog internal | Charge-pump capacitor. Connect a 4.7nF, minimum 10V rated capacitor to AGND. |
10 | AVSS | Analog supply | PGA negative analog supply. See the Analog Power Supplies section for details. |
11 | AVDD1 | Analog supply | PGA positive analog supply. See the Analog Power Supplies section for details. |
12 | AVDD2 | Analog supply | Modulator analog supply. See the Analog Power Supplies section for details. |
13 | AGND | Analog ground | Analog ground. |
14 | CAPI | Analog internal | Input bias capacitor. Connect a 100nF ceramic capacitor to AGND. |
15 | GPIO0 | Digital I/O | General-purpose I/O. |
16 | GPIO1 | Digital I/O | General-purpose I/O. |
17 | CAPD | Analog output | Digital low-dropout regulator (LDO) output. Connect a 220nF ceramic capacitor to DGND. |
18 | DGND | Ground | Digital ground. |
19 | IOVDD | Digital supply | Digital I/O power supply. See the IOVDD Power Supply section for details. |
20 | CLK | Digital input | ADC clock input. |
21 | CS | Digital input | Serial interface select, active low. |
22 | SCLK | Digital input | Serial interface clock. |
23 | DIN | Digital input | Serial interface data in. |
24 | DOUT | Digital output | Serial interface data out. |
25 | DRDY | Digital output | Data ready, active low. |
26 | SYNC | Digital input | ADC synchronization, active high. |
27 | RESET | Digital input | ADC reset, active low. |
28 | PWDN | Digital input | ADC power down, active low. |
29 | REFN | Analog input | Negative reference input. See the Voltage Reference Input section for details. |
30 | REFP | Analog input | Positive reference input. See the Voltage Reference Input section for details. |
31 | CAPR | Analog internal | Reference bias capacitor. Connect a 100nF ceramic capacitor to AVSS. |
32 | AVSS | Analog supply | PGA negative supply. |
Thermal pad | Connect the thermal pad to AVSS. Thermal vias placed in the printed circuit board (PCB) land are optional to allow placement of bottom side components. |