JAJSQP4 February 2024 ADS1288
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ANALOG INPUTS | |||||||
Input mux on-resistance | Input 1 to input 2 cross connection | 60 | Ω | ||||
PGA OPERATION | |||||||
IB | Input current | 45 | nA | ||||
IOS | Input offset current | ±3 | nA | ||||
Gain | 1, 2, 4, 8, 16, 32, 64 | V/V | |||||
en-PGA | Input voltage noise density | PGA Gain = 16 | 20 | nV/√Hz | |||
in-PGA | Input current noise density | Differential | 2.5 | pA/√Hz | |||
Antialias filter frequency | 30 | kHz | |||||
BUFFER OPERATION | |||||||
IB | Input current | VIN = 2.5V | ±0.3 | µA | |||
DC PERFORMANCE | |||||||
en | Noise | See Noise Performance section for details | |||||
VOS | Offset error | PGA operation | –350/gain - 10 | ±30/gain + 5 | 350/gain + 10 | µV | |
Buffer operation | –600 | ±50 | 600 | ||||
After calibration | ±1 | ||||||
Offset error drift | PGA operation | 0.5/gain | µV/°C | ||||
Buffer operation | 1 | ||||||
Gain error | PGA operation, gain = 1 | –0.05% | ±0.02% | 0.05% | |||
After calibration | 2 | ppm | |||||
Buffer operation | –0.07% | ±0.05% | 0.07% | ||||
Gain match | Relative to PGA gain = 1 | –0.2% | ±0.06% | 0.2% | |||
Gain drift | All PGA gains | 2 | ppm/°C | ||||
CMRR | Common-mode rejection ratio | f = 60Hz | 104 | 120 | dB | ||
PSRR | Power-supply rejection ratio | AVDD2 | At dc | 80 | 95 | dB | |
AVSS, AVDD1 | At dc | 85 | 110 | ||||
IOVDD | At dc | 100 | 120 | ||||
AC PERFORMANCE | |||||||
en-MOD | Modulator voltage noise density | 100 | nV/√Hz | ||||
THD | Total harmonic distortion | AVDD1 = 3.3V, AVSS = 0V, fIN = 31.25Hz, VIN = –0.5dBFS |
Buffer operation | –124 | -117 | dB | |
PGA gain = 2 | –122 | ||||||
PGA gain = 4 | –124 | -116 | |||||
PGA gain = 8 | –125 | ||||||
PGA gain = 16 | –123 | -115 | |||||
PGA gain = 32 and 64 | –124 | ||||||
AVDD1 = 5V, AVSS = 0V, fIN = 31.25Hz, VIN = –0.5dBFS |
Buffer operation | –123 | -117 | ||||
PGA gain = 1 | –121 | -115 | |||||
PGA gain = 2 | –124 | ||||||
PGA gain = 4 | –125 | -115 | |||||
PGA gain = 8 | –122 | ||||||
PGA gain = 16 | –121 | -113 | |||||
PGA gain = 32 and 64 | –123 | ||||||
SFDR | Spurious-free dynamic range | fIN = 31.25Hz, VIN = –0.5dBFS | 115 | dB | |||
Crosstalk | fIN = 31.25Hz, VIN = –0.5dBFS | –140 | dB | ||||
VOLTAGE REFERENCE INPUT | |||||||
Reference input current | 80 | µA/V | |||||
FIR DIGITAL FILTER | |||||||
fDATA | Data rate | 125 | 2000 | SPS | |||
Pass-band ripple | –0.003 | 0.003 | dB | ||||
Pass-band (–0.01dB) | 0.375 × fDATA | Hz | |||||
Bandwidth (–3dB) | 0.413 × fDATA | Hz | |||||
Stop band | 0.5 × fDATA | Hz | |||||
Stop-band attenuation (1) | 135 | dB | |||||
Group delay | Minimum phase filter, at dc | 5 / fDATA | s | ||||
Linear phase filter | 31/ fDATA | ||||||
Settling time (latency) | Minimum phase filter | 62 / fDATA | s | ||||
Linear phase filter | 62 / fDATA | ||||||
IIR DIGITAL FILTER | |||||||
High-pass corner frequency | 0.1 | 10 | Hz | ||||
SAMPLE RATE CONVERTER | |||||||
Frequency compensation range | –244 | 244 | ppm | ||||
Resolution | 7.45 | ppb | |||||
DIGITAL INPUT/OUTPUT | |||||||
VOH | High-level output voltage | IOH = 1mA | 0.8 × IOVDD | V | |||
VOL | Low-level output voltage | IOL = –1mA | 0.2 × IOVDD | V | |||
Ilkg | Input leakage | –1 | 1 | μA | |||
POWER SUPPLY | |||||||
IAVDD1, IAVSS |
AVDD1, AVSS current | AVDD1 = 3.3V | PGA operation | 0.85 | 1.1 | mA | |
Buffer operation | 0.25 | 0.45 | |||||
AVDD1 = 5V | PGA operation | 0.85 | 1.1 | ||||
Buffer operation | 0.25 | 0.45 | |||||
Power-down mode | 1 | 5 | µA | ||||
IAVDD2 | AVDD2 current | AVDD2 = 2.5V | 0.7 | 0.85 | mA | ||
Power-down mode | 1 | 5 | µA | ||||
IIOVDD | IOVDD current | 0.24 | 0.4 | mA | |||
Power-down mode | 1 | 10 | μA | ||||
Standby mode | 200 | ||||||
IOVDD additional current | Sample rate converter operation | 0.6 | mA | ||||
Pd | Power dissipation (2) | AVDD1 = 3.3V AVDD2 = 2.5V |
PGA operation | 5.0 | 6.5 | mW | |
Buffer operation | 3.0 | 4.2 | |||||
AVDD1 = 5V AVDD2 = 2.5V |
PGA operation | 6.4 | 8.3 | ||||
Buffer operation | 3.4 | 5.1 |