JAJSQ90 september   2020 TSB41BA3F-EP

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Terminal Configuration and Functions
    1.     Terminal Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - Driver
    6. 6.6 Electrical Characteristics - Receiver
    7. 6.7 Electrical Characteristics - Device
    8. 6.8 Switching Characteristics
  8. Operating Life Deration
  9. Parameter Measurement Information
  10. Overview
  11. 10Functional Block Diagram
  12. 11Principles Of Operation (1394b Interface)
    1. 11.1 LLC Service Request
    2. 11.2 Status Transfer
    3. 11.3 Receive
    4. 11.4 Transmit
  13. 12Principles Of Operation (1394a-2000 Interface)
    1. 12.1 LLC Service Request
    2. 12.2 Status Transfer
    3. 12.3 Receive
    4. 12.4 Transmit
    5. 12.5 Interface Reset and Disable
  14. 13Applications, Implementation, and Layout
    1. 13.1 Known exceptions to functional specification (errata).
      1. 13.1.1 Errata # 1:Restore from Leaf Node (Nephew)
        1. 13.1.1.1 Detailed Description
        2. 13.1.1.2 Background
        3. 13.1.1.3 Workaround Proposal
        4. 13.1.1.4 Corrective Action
    2. 13.2 Application Information
      1. 13.2.1 Interoperability with earlier revisions of TSB41BA3
      2. 13.2.2 Internal Register Configuration
      3. 13.2.3 Feature Enhancements to revision F
        1. 13.2.3.1 Detect Loss of Descrambler Synchronization
          1. 13.2.3.1.1 Detect Loss of Descrambler Synchronization Advantages and Uses
        2. 13.2.3.2 Fast Retrain
          1. 13.2.3.2.1 Fast-Retrain Advantages and Uses
          2. 13.2.3.2.2 Fast-Retrain Backward Compatibility
        3. 13.2.3.3 Fast Power-On Re-connect
          1. 13.2.3.3.1 Fast Power-On Re-Connect Advantages and Uses
          2. 13.2.3.3.2 Fast Power-On Re-Connect Backward Compatibility
        4. 13.2.3.4 Fast Connection Tone Debounce
        5. 13.2.3.5 Programmable invalidCount
      4. 13.2.4 Power-Class Programming
      5. 13.2.5 Using The TSB41BA3F-EP With A 1394-1995 Or 1394a-2000 Link Layer
      6. 13.2.6 Power-Up Reset
      7. 13.2.7 Crystal Selection
      8. 13.2.8 Bus Reset
      9. 13.2.9 Designing With Powerpad™ Devices
  15. 14Device and Documentation Support
    1. 14.1 Tools and Software
    2. 14.2 Device Nomenclature
    3. 14.3 Documentation Support
    4. 14.4 サポート・リソース
    5. 14.5 Trademarks
    6. 14.6 静電気放電に関する注意事項
    7. 14.7 用語集
  16. 15Mechanical, Packaging, and Orderable Information
    1. 15.1 Packaging Information
    2. 15.2 Mechanical Data

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Switching Characteristics

PARAMETER TEST CONDITION MIN TYP MAX UNIT
tr TP differential rise time, transmit 1394a-2000 10% to 90%, At 1394 connector 0.3 0.8 ns
1394b-2002 S400B 80 800 ps
tf TP differential fall time, transmit 1394a-2000 90% to 10%, At 1394 connector 0.3 0.8 ns
1394b-2002 S400B 80 800 ps
tsu Setup time, CTL0, CTL1, D0–D7, LREQ to PCLK 1394a-2000 50% to 50%, See Figure 8-2 2.5 ns
th Hold time, CTL0, CTL1, D0–D7, LREQ after PCLK 1394a-2000 50% to 50%, See Figure 8-2 0 ns
tsu Setup time, CTL0, CTL1, D0–D7, LREQ to LCLK_PMC 1394b 50% to 50%, See Figure 8-2 2.5 ns
th Hold time, CTL0, CTL1, D0–D7, LREQ after LCLK_PMC 1394b 50% to 50%, See Figure 8-3 0 ns
td Delay time, PCLK to CTL0, CTL1, D0–D7, PINT 1394a-2000 and 1394b-2002 50% to 50%, See Figure 8-3 0.5 1.6 ns