SPRAD12A July   2022  – February 2023 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P550SJ , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   Abstract
  2.   Trademarks
  3. Introduction
  4. SysConfig
  5. Time-Base (TB) Submodule
    1. 3.1 Setting the Frequency
    2. 3.2 Applying a Phase Shift
    3. 3.3 Setting up the Synchronization (Sync) Scheme
  6. Counter-Compare (CC) and Action-Qualifier (AQ) Submodules
    1. 4.1 Calculating the Duty Cycle
  7. Deadband (DB) Submodule
    1. 5.1 Setting up Signal Pairs
  8. Verifying the Output
    1. 6.1 Checking the Duty Cycle and Dead-Time Insertion
    2. 6.2 Checking the Phase Shift Applied
  9. Trip-Zone (TZ) and Digital Compare (DC) Submodules
    1. 7.1 Drive Outputs Low for an ePWM Cycle Upon Trip Condition Set Through CMPSS
    2. 7.2 Drive Outputs Low Until Cleared Through Software Upon Trip Condition set Through GPIO
  10. Event-Trigger (ET) Submodule
    1. 8.1 Setting Up Time-Base Interrupts
  11. Global Load
    1. 9.1 Applying Global Loading and One-Shot Load Feature
    2. 9.2 Linking the ePWM Modules
    3. 9.3 Updating Action Qualifier Settings and Counter Compare Values Through Global Loading
  12. 10Summary
  13. 11References
  14. 12Revision History

Drive Outputs Low Until Cleared Through Software Upon Trip Condition set Through GPIO

Another popular type of trip is a one-shot trip (OSHT). A one-shot trip is used for major short circuit or over-current conditions. When a one-shot trip is detected, the trip-zone submodule drives EPWMxA and EPWMxB to a certain specified state. The outputs remain in that state until the trip is manually cleared.

A GPIO is used to indicate a trip condition on EPWM3 within our application. In order to connect a GPIO to a trip source of the ePWM modules, you need to route it through the Input X-BAR. The Input X-BAR can be used to map any GPIO to the ePWM X-BAR or the ePWM module’s trip sources themselves, depending on the desired signal.

For this use-case, use GPIO 12 and route it through the Input X-BAR’s Input 1, which feeds directly to TZ1 (Trip Zone input 1).

Figure 7-9 GPIO Setup in SysConfig
Figure 7-10 Input X-BAR in SysConfig

The following code is generated from SysConfig:

Void GPIO_init(){
//myGPIO12 initialization 
GPIO_setDirectionMode(myGPIO12, GPIO_DIR_MODE_IN); 
GPIO_setPadConfig(myGPIO12, GPIO_PIN_TYPE_STD); 
GPIO_setMasterCore(myGPIO12, GPIO_CORE_CPU1); 
GPIO_setQualificationMode(myGPIO12, GPIO_QUAL_SYNC); 
GPIO_writePin(myGPIO12, 1);
}
void INPUTXBAR_init(){
//myINPUTXBAR1 initialization 
XBAR_setInputPin(INPUTXBAR_BASE, XBAR_INPUT1, 12); 
XBAR_lockInput(INPUTXBAR_BASE, XBAR_INPUT1);
}

Once the GPIO has been routed, you can set up the event. The first step is choosing Trip 1 as the one-shot trip condition. Every time there is a trip condition that occurs on GPIO 12 (the state of the GPIO goes from high to low), the ePWM outputs go low. The action taken, clear, is specified through the TZA (for ePWMXA) and TZB (for ePWMXB) bits of the TZCTL register.

Figure 7-11 Trip Zone Configuration Including One-Shot Configuration

The following code is generated from SysConfig:

EPWM_setTripZoneAction(myEPWM3_BASE, EPWM_TZ_ACTION_EVENT_TZA, EPWM_TZ_ACTION_LOW);  
EPWM_setTripZoneAction(myEPWM3_BASE, EPWM_TZ_ACTION_EVENT_TZB, EPWM_TZ_ACTION_LOW);  
EPWM_enableTripZoneSignals(myEPWM3_BASE, EPWM_TZ_SIGNAL_OSHT1);  
EPWM_enableTripZoneInterrupt(myEPWM3_BASE, EPWM_TZ_INTERRUPT_OST);

Similar to the cycle-by-cycle trip case, the one-shot trip configuration is also set up to generate an interrupt whenever the trip occurs so that the interrupt flag can be cleared.

void epwm3TZISR(void){
epwm3TZIntCount++
//
// Re-enable the OST Interrupt
//
EPWM_clearTripZoneFlag(myEPWM3_BASE, (EPWM_TZ_INTERRUPT | EPWM_TZ_FLAG_OST));
//
// Acknowledge this interrupt to receive more interrupts from group 2
//
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP2);
}

Now that GPIO12 has been setup to do a one-shot trip on EPWM3, drive GPIO12 low and EPWM3 should go low until the GPIO is no longer low and the one-shot trip flag has been cleared.