SBOS258E November   2002  – April 2025 OPA698

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics VS = ±5V
    6. 6.6 Electrical Characteristics VS = 5V
    7. 6.7 Typical Characteristics: VS = ±5V
    8. 6.8 Typical Characteristics: VS = 5V
  8. 7 Detailed Description
    1. 7.1 Overview
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Output Limiters
      2. 8.1.2  Output Drive
      3. 8.1.3  Thermal Considerations
      4. 8.1.4  Capacitive Loads
      5. 8.1.5  Frequency Response Compensation
      6. 8.1.6  Pulse Settling Time
      7. 8.1.7  Distortion
      8. 8.1.8  Noise Performance
      9. 8.1.9  DC Accuracy and Offset Control
      10. 8.1.10 Input and ESD Protection
    2. 8.2 Typical Applications
      1. 8.2.1  Wideband Voltage-Limiting Operation
      2. 8.2.2  Single-Supply, Noninverting Amplifier
      3. 8.2.3  Wideband Inverting Operation
      4. 8.2.4  Limited Output, ADC Input Driver
        1. 8.2.4.1 Limited-Output, Differential ADC Input Driver
        2. 8.2.4.2 Precision Half-Wave Rectifier
      5. 8.2.5  High-Speed Full-Wave Rectifier
        1. 8.2.5.1 High-Speed Full-Wave Rectifier #1
        2. 8.2.5.2 High-Speed Full-Wave Rectifier #2
      6. 8.2.6  Soft-Clipping (Compression) Circuit
      7. 8.2.7  Very High-Speed Schmitt Trigger
      8. 8.2.8  Unity-Gain Buffer
      9. 8.2.9  DC Restorer
      10. 8.2.10 Video Sync Stripper
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Demonstration Fixture
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.2.6 Soft-Clipping (Compression) Circuit

Figure 8-20 shows a soft-clipping circuit. As soon as the input voltage exceeds either VCH or VCL, the limiting voltages are driven by the following equations:

Equation 10. V H =   V H =   R 2 ×   V C H   +   R 1 ×   V I N R 1   +   R 2
Equation 11. V L =   R 4 ×   V C L   +   R 3 ×   V I N R 3   +   R 4

As the amplifier is operating in the limiting mode, the output voltage is compressed with a gain of R1+R2/R1 for the positive excursion above VCH, and by a gain of R3+R4/R3 for the negative excursion below VCL. Figure 8-21 shows a 5VPP on the input being compressed above ±1V with a compression gain of one-third.

OPA698 Soft-Clipping CircuitFigure 8-20 Soft-Clipping Circuit
OPA698 Soft Clipping With a Gain of 1/3 Above the Clamp Level (±1V)Figure 8-21 Soft Clipping With a Gain of 1/3 Above the Clamp Level (±1V)