SBOS258E November   2002  – April 2025 OPA698

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics VS = ±5V
    6. 6.6 Electrical Characteristics VS = 5V
    7. 6.7 Typical Characteristics: VS = ±5V
    8. 6.8 Typical Characteristics: VS = 5V
  8. 7 Detailed Description
    1. 7.1 Overview
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Output Limiters
      2. 8.1.2  Output Drive
      3. 8.1.3  Thermal Considerations
      4. 8.1.4  Capacitive Loads
      5. 8.1.5  Frequency Response Compensation
      6. 8.1.6  Pulse Settling Time
      7. 8.1.7  Distortion
      8. 8.1.8  Noise Performance
      9. 8.1.9  DC Accuracy and Offset Control
      10. 8.1.10 Input and ESD Protection
    2. 8.2 Typical Applications
      1. 8.2.1  Wideband Voltage-Limiting Operation
      2. 8.2.2  Single-Supply, Noninverting Amplifier
      3. 8.2.3  Wideband Inverting Operation
      4. 8.2.4  Limited Output, ADC Input Driver
        1. 8.2.4.1 Limited-Output, Differential ADC Input Driver
        2. 8.2.4.2 Precision Half-Wave Rectifier
      5. 8.2.5  High-Speed Full-Wave Rectifier
        1. 8.2.5.1 High-Speed Full-Wave Rectifier #1
        2. 8.2.5.2 High-Speed Full-Wave Rectifier #2
      6. 8.2.6  Soft-Clipping (Compression) Circuit
      7. 8.2.7  Very High-Speed Schmitt Trigger
      8. 8.2.8  Unity-Gain Buffer
      9. 8.2.9  DC Restorer
      10. 8.2.10 Video Sync Stripper
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Demonstration Fixture
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.1.4 Capacitive Loads

Capacitive loads, such as the input to ADCs, decreases the amplifier phase margin, which can cause high-frequency peaking or oscillations. Figure 8-3 shows how capacitive loads ≥ 2pF can be isolated by connecting a small resistor in series with the output. Increasing the gain from 2V/V improves the capacitive drive capabilities as a result of increased phase margin.

OPA698 Driving Capacitive Loads Figure 8-3 Driving Capacitive Loads

In general, minimize capacitive loads for optimized high-frequency performance. The capacitance of coax cable (29pF/ft for RG-58) cannot load the amplifier when the coaxial cable, or transmission line, is terminated in the characteristic impedance.