SBOS258E November   2002  – April 2025 OPA698

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Related Products
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics VS = ±5V
    6. 6.6 Electrical Characteristics VS = 5V
    7. 6.7 Typical Characteristics: VS = ±5V
    8. 6.8 Typical Characteristics: VS = 5V
  8. Detailed Description
    1. 7.1 Overview
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Output Limiters
      2. 8.1.2  Output Drive
      3. 8.1.3  Thermal Considerations
      4. 8.1.4  Capacitive Loads
      5. 8.1.5  Frequency Response Compensation
      6. 8.1.6  Pulse Settling Time
      7. 8.1.7  Distortion
      8. 8.1.8  Noise Performance
      9. 8.1.9  DC Accuracy and Offset Control
      10. 8.1.10 Input and ESD Protection
    2. 8.2 Typical Applications
      1. 8.2.1  Wideband Voltage-Limiting Operation
      2. 8.2.2  Single-Supply, Noninverting Amplifier
      3. 8.2.3  Wideband Inverting Operation
      4. 8.2.4  Limited Output, ADC Input Driver
        1. 8.2.4.1 Limited-Output, Differential ADC Input Driver
        2. 8.2.4.2 Precision Half-Wave Rectifier
      5. 8.2.5  High-Speed Full-Wave Rectifier
        1. 8.2.5.1 High-Speed Full-Wave Rectifier #1
        2. 8.2.5.2 High-Speed Full-Wave Rectifier #2
      6. 8.2.6  Soft-Clipping (Compression) Circuit
      7. 8.2.7  Very High-Speed Schmitt Trigger
      8. 8.2.8  Unity-Gain Buffer
      9. 8.2.9  DC Restorer
      10. 8.2.10 Video Sync Stripper
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Demonstration Fixture
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Noise Performance

High slew rate, unity-gain stable, voltage feedback op amps usually achieve slew rate at the expense of a higher input noise voltage. However, the 4nV/√Hz input voltage noise for the OPA698 is much less than comparable amplifiers. The input-referred voltage noise, and the two input-referred current noise terms, combine to give low output noise under a wide variety of operating conditions. Figure 8-5 shows the op amp noise analysis model with all the noise terms included. In this model, all noise terms are taken to be noise voltage or current density terms in either nV/√Hz or pA/√Hz.

OPA698 Op Amp Noise Analysis
                    Model Figure 8-5 Op Amp Noise Analysis Model

The total output spot noise voltage can be computed as the square root of the sum of all squared output noise voltage contributors. Equation 5 shows the general form for the output noise voltage using the terms shown in Figure 8-6.

Equation 5. E O   =   ( E N I 2   +   ( I B N R S ) 2   +   4 k T R S ) N G 2   +   ( I B I R F ) 2 +   4 k T R F N G

Dividing this expression by the noise gain (NG = (1+RF/RG)) gives the equivalent input-referred spot noise voltage at the noninverting input:

Equation 6. E N =   E N I 2   +   ( I B N R S ) 2   +   4 k T R S + ( I B I R F N G ) 2   +   4 k T R F N G  

Evaluating these two equations for the OPA698 circuit and component values (see Figure 8-8) gives a total output spot noise voltage of 9.5nV/√Hz and a total equivalent input spot noise voltage of 4.8nV/√Hz. This total input-referred spot noise voltage is only slightly greater than the 4nV/√Hz specification for the op amp voltage noise alone. The total noise is dominated by the input-referred spot noise of the OPA698 as long as the impedance appearing at each op amp input is limited to a maximum value of 300Ω. Keep both (RF || RG) and the noninverting input source impedance less than 300Ω to satisfy both noise and frequency response flatness considerations. The resistor-induced noise is relatively negligible; therefore, additional capacitive decoupling across the bias current cancellation resistor (RT) for the inverting op amp configuration of Figure 8-10 is not required, but is still desirable.