SBOS258E November   2002  – April 2025 OPA698

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics VS = ±5V
    6. 6.6 Electrical Characteristics VS = 5V
    7. 6.7 Typical Characteristics: VS = ±5V
    8. 6.8 Typical Characteristics: VS = 5V
  8. 7 Detailed Description
    1. 7.1 Overview
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Output Limiters
      2. 8.1.2  Output Drive
      3. 8.1.3  Thermal Considerations
      4. 8.1.4  Capacitive Loads
      5. 8.1.5  Frequency Response Compensation
      6. 8.1.6  Pulse Settling Time
      7. 8.1.7  Distortion
      8. 8.1.8  Noise Performance
      9. 8.1.9  DC Accuracy and Offset Control
      10. 8.1.10 Input and ESD Protection
    2. 8.2 Typical Applications
      1. 8.2.1  Wideband Voltage-Limiting Operation
      2. 8.2.2  Single-Supply, Noninverting Amplifier
      3. 8.2.3  Wideband Inverting Operation
      4. 8.2.4  Limited Output, ADC Input Driver
        1. 8.2.4.1 Limited-Output, Differential ADC Input Driver
        2. 8.2.4.2 Precision Half-Wave Rectifier
      5. 8.2.5  High-Speed Full-Wave Rectifier
        1. 8.2.5.1 High-Speed Full-Wave Rectifier #1
        2. 8.2.5.2 High-Speed Full-Wave Rectifier #2
      6. 8.2.6  Soft-Clipping (Compression) Circuit
      7. 8.2.7  Very High-Speed Schmitt Trigger
      8. 8.2.8  Unity-Gain Buffer
      9. 8.2.9  DC Restorer
      10. 8.2.10 Video Sync Stripper
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Demonstration Fixture
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.6 Electrical Characteristics VS = 5V

at TA ≅ 25°C, RF = 402Ω, RL = 500Ω, G = 2V/V, VL = VCM – 1.2V, and VH = VCM + 1.2V, and input and output referenced to midsupply (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE 
Small-signal bandwidth G = 1V/V, VO = 0.2VPP, RF = 25Ω 550 MHz
G = 2V/V, VO = 0.2VPP 200
G = –1V/V, VO = 0.2VPP 210
Gain bandwidth product G ≥  5V/V, VO < 0.2VPP 300 MHz
Bandwidth for 0.1dB gain flatness VO < 0.2VPP 26 MHz
Peaking at a gain of 1V/V G = 1V/V, RF = 25Ω, VO = 0.2VPP 2.5 dB
Large-signal bandwidth VO = 2VPP 200 MHz
Slew rate 2V step 820 V/µs
Rise-and-fall time VO = 0.2V step 1.4 ns
Settling time 0.05%, G = 2V/V, VO = 1V step 28 ns
2nd-order harmonic distortion f = 5MHz, VO = 2VPP, RL = 500Ω –95 dBc
3rd-order harmonic distortion f = 5MHz, VO = 2VPP, RL = 500Ω –81 dBc
Input voltage noise f > 1MHz 4 nV/√Hz
Input current noise f > 1MHz 1.43 pA/√Hz
DC PERFORMANCE(1)
AOL Open-loop voltage gain VO = ±0.5V, VCM = 2.5V 54 77 dB
TA = –40°C to +85°C
51
Input offset voltage VCM = 2.5V ±1
±6

 mV
TA = –40°C to +85°C
±8
Average offset voltage drift VCM = 2.5V TA = –40°C to +85°C ±15 µV/°C
Input bias current VCM = 2.5V ±0.5 ±10 µA
TA = –40°C to +85°C ±12
Average bias current drift VCM = 2.5V TA = –40°C to +85°C ±25 nA/°C
Input offset current VCM = 2.5V ±0.1 ±2 µA
TA = –40°C to +85°C ±3
Average offset current drift VCM = 2.5V TA = –40°C to +85°C ±15 nA/°C
CMIR Common-mode input voltage TA = 25°C VCM ±0.7 VCM ±0.8 V
CMIR Common-mode input voltage(2) TA = –40°C to +85°C VCM ±0.6 V
INPUT
CMRR Common-mode rejection ratio VCM =  ±0.5V 54 82 dB
TA = –40°C to +85°C 52
Input impedance Differential mode, VCM = 2.5V 0.77 || 0.3 MΩ || pF
Common-mode, VCM = 2.5V 24 || 1.5
OUTPUT
Most-positive output voltage RL ≥ 500Ω,
VH = VCM + 1.8V		 3.9 4.1 V
TA = –40°C to +85°C 3.8
Least-positive output voltage RL ≥ 500Ω,
VL = VCM – 1.8V		 1.1 0.9 V
TA = –40°C to +85°C
1.2
Current output Sourcing, VO = 2.5V 60 170 mA
TA = –40°C to +85°C 50
 
Sinking,, VO = 2.5V
–60

 –170
TA = –40°C to +85°C
–50
Closed-loop output impedance G = 1V/V, f < 100kHz, RF = 25Ω 0.1 Ω
OUTPUT VOLTAGE LIMITER
Limiter voltage high Pin 8 3.9 V
Limiter voltage low Pin 5 1.1 V
Default limiter voltage Limiter pins open VCM ±0.8 VCM ±1.1 V
TA = –40°C to +85°C VCM ±0.6
Minimum limiter separation (VH – VL) 400 400 mV
TA = –40°C to +85°C 400
Maximum limit voltage VCM ±1.8 V
Limiter input bias current magnitude(3) VO = 2.5V 8 µA
Limiter input impedance 1 || 7 MΩ || pF
Limiter feedthrough(4) f = 5MHz –92 dB
Limiter voltage accuracy VIN = VCM ± 1.2V,
(VO – VH) or (VO – VL)		 ±15 ±30 mV
TA = –40°C to +85°C ±40
Limiter small-signal bandwidth VIN = VCM ± 1.2V, VO < 0.02VPP 515 MHz
Limiter slew rate(5) 2 × overdrive, VH or VL 150 V/µs
Overshoot 2 × overdrive, VIN = VCM to VCM ± 1.2V step 40 mV
Recovery time 2 × overdrive, VIN = VCM ± 1.2V to VCM step 2.5 ns
Linearity guardband(6) f = 5MHz, VO = 2VPP 30 mV
POWER SUPPLY
Quiescent current VS = 5V 13.6 15.6 17.2 mA
TA = –40°C to +85°C 13.2 17.6 
+PSRR Power-supply rejection ratio VS = 4.5V to 5.5V 85 dB
(1) Current is considered positive out of node.
(2) CMIR tested as < 3dB degradation from minimum CMRR at specified limits.
(3) IVH (VH bias current) is positive, and IVL (VL bias current) is negative, under these conditions. See Figure 7 -9 and Figure 7-15.
(4) Limiter feedthrough is the ratio of the output magnitude to the sine wave added to VH (or VL) when VIN = 0V.
(5) VH slew rate conditions are: VIN = 2V, G = 2V/V, VL = –2V, VH = step between 2V and 0V. VL slew rate conditions are similar.
(6) Linearity guardband is defined for an output sinusoid (f = 5MHz, VO = 0VDC ±1VPP) centered between the limiter levels (VH and VL). Linearity guardband is the difference between the limiter level and the peak output voltage where SFDR decreases by 3dB.