SCDS453E June   2024  – October 2025 TMUXS7614D

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Source or Drain Current through Switch
    6. 5.6  Electrical Characteristics (Global)
    7. 5.7  Electrical Characteristics (±15V Dual Supply)
    8. 5.8  Switching Characteristics (±15V Dual Supply)
    9. 5.9  Electrical Characteristics (±20V Dual Supply)
    10. 5.10 Switching Characteristics (±20V Dual Supply)
    11. 5.11 Electrical Characteristics (+37.5V/–12.5V Dual Supply)
    12. 5.12 Switching Characteristics (+37.5V/–12.5V Dual Supply)
    13. 5.13 Electrical Characteristics (12V Single Supply)
    14. 5.14 Switching Characteristics (12V Single Supply)
    15. 5.15 SPI Timing Characteristics (2.7V to 5.5V)
    16. 5.16 SPI Timing Characteristics (1.8V to 2.7V)
    17. 5.17 Timing Diagrams
    18. 5.18 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  tON and tOFF Time
    5. 6.5  Break-Before-Make
    6. 6.6  Charge Injection
    7. 6.7  Off Isolation
    8. 6.8  Channel-to-Channel Crosstalk
    9. 6.9  Bandwidth
    10. 6.10 THD + Noise
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Rail-to-Rail Operation
      3. 7.3.3 1.8V Logic Compatible Inputs
      4. 7.3.4 Flat On-Resistance
      5. 7.3.5 Power-Up Sequence Free
    4. 7.4 SPI Operation
      1. 7.4.1 Address Mode
      2. 7.4.2 Burst Mode
      3. 7.4.3 Daisy Chain Mode
      4. 7.4.4 Error Detection
        1. 7.4.4.1 Address R/W Error Flag
        2. 7.4.4.2 SCLK Count Error Flag
        3. 7.4.4.3 CRC (Cyclic Redundancy Check) Enable and Error Flag
        4. 7.4.4.4 Clearing Error Flags
      5. 7.4.5 Software Reset
    5. 7.5 Device Functional Modes
    6. 7.6 Register Map
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Recommended Reflow Profile
    4. 8.4 Thermal Considerations
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

1 Features

  • Dual supply range: ±4.5V to ±25V
  • Single supply range: 4.5V to 42V
  • Asymmetric dual supply support (For example: VDD=37.5V, VSS=-12.5V)
  • 1.8V logic compatible
  • SPI supply range: 1.8V – 5.5V
  • SPI Interface with support up to 50MHz
    • Manual mode (Standard SPI or Burst mode)
    • Section 7.4.3
    • SPI error detection: CRC, invalid read/write, and clock count error
    • Compatible with SPI industry standard modes 0 and 3
  • Ultra high channel density (2.5mm2/ch)
    • Flow through SPI and supply routing for increased board density
    • Integrated decoupling capacitors
  • Precision performance:
    • Low on-resistance: 1Ω (typical)
    • Ultra low on-resistance flatness: 0.001Ω (typical)
    • Low on-leakage current: 13pA (typical), 350pA (maximum)
    • Ultra low charge injection: 2pC (typical)
  • High current support: 470mA per channel (maximum)
  • –40°C to +125°C operating temperature
  • Rail-to-rail operation
  • Bidirectional operation
  • Break-before-make switching
  • ESD protection HBM: 3000V