SDAA014 November   2025 AM2752-Q1 , AM2754-Q1

 

  1.   1
  2.   Abstract
  3.   How to Use this Document
  4.   Trademarks
  5. 1Digital Audio Formats
    1. 1.1 I2S
    2. 1.2 TDM
  6. 2McASP Overview
  7. 3McASP Connections for AM275x
    1. 3.1 McASP Common Configurations
      1. 3.1.1 McASP as a Clock Controller
        1. 3.1.1.1 Clocks Generated using the Internal Audio PLL
        2. 3.1.1.2 Clocks Generated using the AUDIO_EXT_REFCLK AUXCLK Source
        3. 3.1.1.3 Clocks Generated using the AUDIO_EXT_REFCLK AHCLK Source
      2. 3.1.2 McASP as Clock Peripheral
        1. 3.1.2.1 Clock Externally Generated with AUDIO_EXT_REFCLK Input
  8. 4McASP Layout Considerations
    1. 4.1 McASP Signals Shared with Bootmode Logic
    2. 4.2 McASP Topology for Multiple Devices in Single Clock Domain
  9. 5ASRC Overview
  10. 6McASP Practical Examples
    1. 6.1 Audio Playback with Internal Audio PLL for Two Clock Domains
    2. 6.2 Audio Playback with External Clock Source and McASP SYNC mode
    3. 6.3 Audio Playback with ASRC Bridging Two Clock Domains
  11. 7Key Audio System Design Takeaways
  12. 8References

1.1 I2S

Inter IC Sound (I2S) is a standard digital audio protocol specifically defined for stereo audio. Stereo audio means that each digital audio frame consists of two channels: left and right. An I2S frame is defined by the following characteristics:

  • Falling edge of frame sync indicates frame start
  • 1-bit clock cycle delay between frame sync falling edge and data transmission
  • Single word frame sync width
  • Two channels per frame
  • Most significant bit first serial bitstream order
  • Data shifted out on falling edge of bit clock
  • Data sampled in on rising edge of bit clock

I2S Timing Diagram Figure 1-2 I2S Timing Diagram