SDAA132 December   2025 MSPM33C321A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 MSPM33C Hardware Design Check List
  5. 2 Power Supplies in MSPM33C Devices
    1. 2.1 Digital Power Supply
    2. 2.2 Analog Power Supply
    3. 2.3 Built-in Power Supply and Voltage Reference
    4. 2.4 Recommended Decoupling Circuit for Power Supply
    5. 2.5 Recommended Decoupling Circuit for VBAT
  6. 3 Reset and Power Supply Supervisor
    1. 3.1 Digital Power Supply
    2. 3.2 Power Supply Supervisor
  7. 4 Clock System
    1. 4.1 Internal Oscillators
    2. 4.2 External Oscillators
    3. 4.3 External Clock Output (CLK_OUT)
    4. 4.4 Frequency Clock Counter (FCC)
  8. 5 Debugger
    1. 5.1 Debug Port Pins and Pinout
    2. 5.2 Debug Port Connection With Standard JTAG Connector
  9. 6 Key Analog Peripherals
    1. 6.1 ADC Design Considerations
    2. 6.2 COMP Design Considerations
  10. 7 Key Digital Peripherals
    1. 7.1 Timer Resources and Design Considerations
    2. 7.2 UART and LIN Resources and Design Considerations
    3. 7.3 MCAN Design Considerations
    4. 7.4 I2C and SPI Design Considerations
    5. 7.5 I2S/TDM Design Considerations
    6. 7.6 QSPI Design Considerations
  11. 8 GPIOs
    1. 8.1 GPIO Output Switching Speed and Load Capacitance
    2. 8.2 GPIO Current Sink and Source
    3. 8.3 High-Speed GPIOs (HSIO)
    4. 8.4 High-Drive GPIOs (HDIO)
    5. 8.5 Communicate With a 1.8V Device Without a Level Shifter
    6. 8.6 Unused Pins Connection
  12. 9 Layout Guides
    1. 9.1 Power Supply Layout
    2. 9.2 Considerations for Ground Layout
    3. 9.3 Traces, Vias, and Other PCB Components
    4. 9.4 How to Select Board Layers and Recommended Stack-up
  13. 10Bootloader
    1. 10.1 Bootloader Introduction
    2. 10.2 Bootloader Hardware Design Considerations
      1. 10.2.1 Physical Communication interfaces
      2. 10.2.2 Hardware Invocation
  14. 11Summary
  15. 12References

4.1 Internal Oscillators

Internal Low-Frequency Oscillator (LFOSC)

LFOSC is an on-chip low power oscillator that is factory trimmed to a frequency of 32.768kHz. This provides a low-frequency clock that can be used to help the system achieve low power consumption. This oscillator is only available when the LFSS is properly powered through the VBAT voltage rail. The LFOSC can provide higher accuracy when used over a reduced temperature range. See the device-specific data sheet for details.

MSPM33C Series LFOSCFigure 4-1 MSPM33C Series LFOSC

Internal System Oscillator (SYSOSC)

SYSOSC is an on-chip, accurate, and configurable oscillator with factory-trimmed frequencies of 32MHz (base frequency) and 4MHz (low frequency). This provides a high frequency clock that allows the CPU to run at high speed for executing code and processing performance. SYSOSC also has a feedback loop (FCL) that when enabled improves its accuracy. Please see the device-specific datasheet for information on SYSOSC performance with FCL enabled and disabled.

MSPM33C Series SYSOSC Figure 4-2 MSPM33C Series SYSOSC

System Phase-Locked Loop (SYSPLL)

SYSPLL is the system phase-locked loop with programmable frequency and is used to achieve the MSPM33C series highest speed (160MHz).

MSPM33C SYSPLL CircuitFigure 4-3 MSPM33C SYSPLL Circuit