SDAA170 September   2026 TPS61383-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Design Requirement and System Structure
    1. 2.1 Design Requirements
    2. 2.2 System Structure
      1. 2.2.1 Centralized E‑Latch System
      2. 2.2.2 Distributed E‑Latch System
  6. 3Power Train
    1. 3.1 Integrated E-Latch Power Train with TPS61383-Q1
      1. 3.1.1 Super Capacitor Charger Function Introduction
      2. 3.1.2 Boost Function Introduction
      3. 3.1.3 Super Capacitor Bleeding
    2. 3.2 Hardware Design Procedure
      1. 3.2.1 Selecting the External MOSFET
      2. 3.2.2 Inductor Selection
      3. 3.2.3 Capacitor in Super Capacitor Side
      4. 3.2.4 Boost Output Capacitor
      5. 3.2.5 Loop Compensation Design
      6. 3.2.6 Key Considerations
    3. 3.3 Software Initial Process
  7. 4Super Capacitor Energy Modeling Basis and Selection
    1. 4.1 Discharge Profile and Cut-off Voltage
    2. 4.2 Super Capacitor Discharge Energy Modeling
    3. 4.3 Calculation Example
    4. 4.4 Super Capacitor Excel Calculation Tool
  8. 5Super Capacitor Management
    1. 5.1 Voltage Monitoring with BQ76907-Q1
    2. 5.2 Cell Balancing with BQ76907-Q1
      1. 5.2.1 Balancing Strategy
      2. 5.2.2 I2C Implementation
      3. 5.2.3 Cell Balancing Current
      4. 5.2.4 Low-Side Protection Circuit Design Considerations
    3. 5.3 Super Capacitor Health Detection: Combined Solution of TPS61383-Q1 and BQ76907-Q1
  9. 6Control Unit and Communication
    1. 6.1 Control Unit Design Consideration
    2. 6.2 SBC Selection
  10. 7Execution Unit
    1. 7.1 Motor Driver Structure
    2. 7.2 Motor Driver Design Considerations
  11. 8Summary
  12. 9References

Integrated E-Latch Power Train with TPS61383-Q1

Figure 3-1 shows a typical E-latch system using the TPS61383-Q1. This device is designed to charge super capacitor when 12V main battery is normal and boost back-up battery energy to Vsystem when 12V battery is disconnected.

 Typical E-Latch
                    Application Figure 3-1 Typical E-Latch Application

TPS61383-Q1 supports four functional modes for its main functions: charger mode, boost mode, State-of-Health (SOH) mode and standby mode. The power structure of each modes are depicted by the following images.

 Standby ModeFigure 3-2 Standby Mode
 Boost ModeFigure 3-3 Boost Mode
 Charger Mode Figure 3-4 Charger Mode
 SOH Mode Figure 3-5 SOH Mode

TPS61383-Q1 applies AND logic on its EN pins and I2C EN bits. The boost function is enabled when EN_BST pin and BST_EN bit is both high. Charger is enabled when EN_CHGR pin is high and CHGR_SOH_EN bit is 01b. SOH is enabled when EN_CHGR pin is high and CHGR_SOH_EN bit is 10b.

Table 3-1 Operating Modes Control Logic
Boost Enable: EN_BST pin AND BST_EN Bit Charger/SOH Enable: EN_CHGR AND CHGR_SOH_EN Bit Device State Device Operation
EN_BST = 0 or BST_EN = 0 EN_CHGR = 1 and CHGR_SOH_EN = 01b Pure charger Charger Active.
EN_BST = 0 or BST_EN = 0 EN_CHGR = 1 and CHGR_SOH_EN = 10b Pure SOH SOH Active.
EN_BST = 1 and BST_EN = 1 EN_CHGR = 0 or CHGR_SOH_EN=00b Automatic boost and standby
  • Boost Active: VOUT < BST_WAKE
  • Standby Active: VOUT > VOUT_STANDBY(106%VOUT_TARGET)
EN_BST = 1 and BST_EN = 1 EN_CHGR = 1 and CHGR_SOH_EN = 01b Automatic boost and charger mode
  • Boost Active: VOUT < BST_WAKE
  • Charger Active: VOUT > VOUT_STANDBY(106%VOUT_TARGET)
EN_BST = 1 and BST_EN = 1 EN_CHGR = 1 and CHGR_SOH_EN = 10b Automatic boost and SOH mode
  • Boost Active: VOUT < BST_WAKE
  • SOH Active: VOUT > VOUT_STANDBY(106%VOUT_TARGET)

When multiple functions are enabled, TPS61383-Q1 monitors system voltage by VOUT pin to decide which function mode to enter. The IC stays in standby/ charger or SOH mode (depending on which function is enabled) when system voltage is sufficient and automatically transition into boost mode when car battery malfunction occurs and voltage drop on system voltage is detected. The different operation modes are shown in the Figure 3-6

 Functional State Diagram Figure 3-6 Functional State Diagram
 Automatic
                    Boost and Standby/Charger/SOH Transition Logic Figure 3-7 Automatic Boost and Standby/Charger/SOH Transition Logic