SFFS948 May   2025 MSPM0L1227-Q1 , MSPM0L1228-Q1 , MSPM0L2227-Q1 , MSPM0L2228-Q1

 

  1.   1
  2. 1Introduction
    1.     Trademarks
  3. 2 MSPM0Lx22x-Q1 Hardware Component Functional Safety Capability
  4. 3Development Process for Management of Systematic Faults
    1. 3.1 TI New-Product Development Process
    2. 3.2 TI Functional Safety Development Process
  5. 4 MSPM0Lx22x-Q1 Component Overview
    1. 4.1 Targeted Applications
    2. 4.2 Hardware Component Functional Safety Concept
    3. 4.3 Functional Safety Constraints and Assumptions
  6. 5Description of Hardware Component Parts
    1. 5.1  ADC
    2. 5.2  Comparator
    3. 5.3  CPU
    4. 5.4  RAM
    5. 5.5  FLASH
    6. 5.6  GPIO
    7. 5.7  DMA
    8. 5.8  SPI
    9. 5.9  I2C
    10. 5.10 UART
    11. 5.11 Timers (TIMx)
    12. 5.12 Power Management Unit (PMU)
    13. 5.13 Clock Module (CKM)
    14. 5.14 Events
    15. 5.15 IOMUX
    16. 5.16 VREF
    17. 5.17 WWDT and IWDT
    18. 5.18 CRC
  7. 6 MSPM0Lx22x-Q1 Management of Random Faults
    1. 6.1 Fault Reporting
    2. 6.2 Functional Safety Mechanism Categories
    3. 6.3 Description of Functional Safety Mechanisms
      1. 6.3.1  ADC1, COMP1, DMA1, GPIO2, TIM2, I2C2, IOMUX1, SPI2, UART2, SYSCTL5, CPU4, CRC1, EVENT1, REF1, WDT1, VBAT2:Periodic Read of Static Configuration Registers
      2. 6.3.2  ADC2: Software Test of Functionality
      3. 6.3.3  ADC3: ADC Trigger Overflow Check
      4. 6.3.4  ADC4: Window Comparator
      5. 6.3.5  ADC5: Test of Window Comparator
      6. 6.3.6  ADC6: ADC Trigger, Output Plausibility Checks
      7. 6.3.7  COMP3: External Pin Input to COMP
      8. 6.3.8  COMP4: Comparator Hysteresis
      9. 6.3.9  WDT: Windowed Watchdog Timer
      10. 6.3.10 WDT2: WWDT Counter Check
      11. 6.3.11 WDT3: WWDT Software Test
      12. 6.3.12 WDT4: Redundant WDT
      13. 6.3.13 IWDT: Independent Watchdog Timer
      14. 6.3.14 REF2: VREF to ADC Reference Input
      15. 6.3.15 CPU1: CPU Test Using Software Test Library
      16. 6.3.16 CPU2: Software Test of CPU Data Busses
      17. 6.3.17 CPU3: Software Diversified Redundancy
      18. 6.3.18 SYSMEM1: Software Read of Memory, DMA Write
      19. 6.3.19 SYSMEM2: DMA Read from SRAM, CPU Write
      20. 6.3.20 SYSMEM7: ECC Protection on SRAM
      21. 6.3.21 SYSMEM8: ECC Logic Test
      22. 6.3.22 SYSMEM9: RAM Software Test
      23. 6.3.23 FLASH1: Flash Single-Error Correction, Double-Error Detection Mechanism
      24. 6.3.24 FLASH2: Flash CRC
      25. 6.3.25 FXBAR2: Periodic Software Read Back of Flash Data
      26. 6.3.26 FXBAR3: Software Test of ECC Checker Logic
      27. 6.3.27 FXBAR4: Write Protection of Flash
      28. 6.3.28 DMA2: Software Test of DMA Function
      29. 6.3.29 DMA3: Software DMA Channel Test
      30. 6.3.30 DMA4: CRC Check of the Transferred Data
      31. 6.3.31 GPIO1: Online Monitoring Using I/O Loopback
      32. 6.3.32 GPIO3: GPIO Multiple (Redundant) Inputs/Outputs
      33. 6.3.33 TIM1: Test for PWM Generation
      34. 6.3.34 TIM3: Test for Fault Generation
      35. 6.3.35 TIM4: Fault Detection to Take the PWMs to Safe State
      36. 6.3.36 TIM5: Input Capture on Two or More Timer Instances
      37. 6.3.37 TIM6: Timer Period Monitoring
      38. 6.3.38 I2C1: Software Test of I2C Function Using Internal Loopback Mechanism
      39. 6.3.39 I2C3, SPI4, UART3, MCAN2: Information Redundancy Techniques Including End-to-End Safing
      40. 6.3.40 I2C4, SPI5, UART4: Transmission Redundancy
      41. 6.3.41 I2C5, UART5: Timeout Monitoring
      42. 6.3.42 I2C6: Test of CRC Function
      43. 6.3.43 I2C7: Packet Error Check in SMBUS Mode
      44. 6.3.44 IOMUX2: IOMUX Coverage as Part of Other IP Safety Mechanisms
      45. 6.3.45 SPI1: Software Test of SPI Function
      46. 6.3.46 SPI3: SPI Periodic Safety Message Exchange
      47. 6.3.47 UART1: Software Test of UART Function
      48. 6.3.48 UART6: UART Error Flags
      49. 6.3.49 UART7: UART Glitch filter
      50. 6.3.50 SYSCTL1: MCLK Monitor
      51. 6.3.51 SYSCTL2: HFCLK Start-Up Monitor
      52. 6.3.52 SYSCTL3: LFCLK Monitor
      53. 6.3.53 SYSCTL8: Brownout Reset (BOR) Supervisor
      54. 6.3.54 SYSCTL9: FCC Counter Logic to Calculate Clock Frequencies
      55. 6.3.55 SYSCTL10: External Voltage Monitor
      56. 6.3.56 SYSCTL11: Boot Process Monitor
      57. 6.3.57 SYSCTL14: Brownout Voltage Monitor
      58. 6.3.58 SYSCTL15: External Voltage Monitor
      59. 6.3.59 SYSCTL16: External Watchdog Timer
      60. 6.3.60 CRC: CRC Checker
      61. 6.3.61 VBAT1: VBAT Supply Monitor
      62. 6.3.62 Safety Mechanisms Covering PIN Failures
      63. 6.3.63 Safety Mechanisms Covering Common Cause Failures
  8.   A Summary of Recommended Functional Safety Mechanism Usage
  9.   B Distributed Developments
    1.     B.1 How the Functional Safety Lifecycle Applies to TI Functional Safety Products
    2.     B.2 Activities Performed by Texas Instruments
    3.     B.3 Information Provided
  10.   C Revision History

Summary of Recommended Functional Safety Mechanism Usage

Appendix A summarizes the functional safety mechanisms present in hardware or recommended for implementation in software or at the system level as described in Chapter 5. Table 7-1 describes each column in Table 7-2 and gives examples of what content can appear in each cell.

Table A-1 Legend of Functional Safety Mechanisms
Functional Safety Mechanism Description
TI Safety Mechanism Unique Identifier A unique identifier assigned to this safety mechanism for easier tracking.
Safety Mechanism Name The full name of this safety mechanism.
Safety Mechanism Category Safety Mechanism - This test provides coverage for faults on the primary function. It may also provide coverage on another safety mechanism. These tests also provide coverage of primary function multiple-point faults if it covers permanent faults.

Test for Safety Mechanism - This test provides coverage for faults of a safety mechanism only. It does not provide coverage on the primary function.

Fault Avoidance - This is typically a feature used to improve the effectiveness of a related safety mechanism.

Safety Mechanism Type Can be either hardware, software, a combination of both hardware and software, or system. See Section 6.2 for more details.
Safety Mechanism Operation Interval The timing behavior of the safety mechanism with respect to the test interval defined for a functional safety requirement / functional safety goal. Can be either continuous, or on-demand.

Continuous - the safety mechanism constantly monitors the hardware-under-test for a failure condition.

Periodic or On-Demand - the safety mechanism is executed periodically, when demanded by the application. These tests have to be performed within the FTTI (Fault tolerant time interval) determined by the application. The test of diagnostics have to be performed once within the multiple-point fault detection interval. This includes Built-In Self-Tests that are executed one time per drive cycle or once every few hours.

Test Execution Time Time period required for the safety mechanism to complete, not including error reporting time.

Note: Certain parameters are not set until there is a concrete implementation in a specific component. When component specific information is required, the component data sheet must be referenced.

Note: For software-driven tests, the majority contribution of the Test Execution Time is often software implementation-dependent.

Action on Detected Fault The response that this safety mechanism takes when an error is detected.

Note: For software-driven tests, the Action on Detected Fault can depend on software implementation.

Time to Report Typical time required for safety mechanism to indicate a detected fault to the system.

Note: For software-driven tests, the majority contribution of the Time to Report is often software implementation-dependent.

Diagnostic Evaluation Basis of diagnostic coverage evaluation:
  • Injection - Diagnostic coverage evaluation is based on TI-driven fault injection campaign
  • Insertion - Diagnostic coverage evaluation is based on customer-driven fault insertion campaign
  • Calculation - Diagnostic coverage evaluation is based on analytical or independent experimental data
  • Estimation - Diagnostic coverage evaluation is based on expert judgment
Note: Insertion refers to the ability of a system integrator to inject faults using external test fixtures, e.g. an Ethernet CRC check can be tested by sending in Ethernet packets with a bad CRC. Insertion is not expected to replace functional verification performed by TI. The intention of insertion is first, that the system can verify that the diagnostic is working and the system response to the diagnostic. The second is that a system integrator can, if necessary, measure overall diagnostic effectiveness in the context of their system. For example, the overall diagnostic coverage for methods protecting Ethernet can be measured at the system level by having the entire solution (hardware + software) running and sending in bad packets. The customer can choose to perform these techniques to update the DC values with more accurate numbers pertaining to their use cases. For these diagnostic where insertion is used as DC evaluation method, TI provides the DC coverage based on assumed safety use case in a SEOOC development.
Diagnostic Detection Capability
  • Permanent - Diagnostic is capable of detecting permanent faults and runs within FTTI. The diagnostic is also capable of detecting primary function multiple-point faults.
  • Transient - Diagnostic is capable of detecting transient faults and runs within FTTI.
  • Permanent /Transient - Diagnostic is capable of detecting permanent and transient faults and runs within FTTI.
  • Latent - Diagnostic is capable of detecting multiple-point latent faults and runs within MPFTTI.
Table A-2 Summary of Safety Features and Diagnostics
TI Safety Mechanism Unique Identifier Safety Mechanism Name Safety Mechanism Category Safety Mechanism Type Safety Mechanism Operation Interval Test Execution Time Action on Detected Fault Time to Report Diagnostic Evaluation Diagnostic Detection Capability
ADC1 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
ADC2 ADC Software Test of Functionality Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
WDT Windowed Watchdog Event Safety Mechanism Hardware + Software Continuous Application Dependent Reset the Device <1μs Estimation Permanent or Transient
IWDT Watchdog Event Safety Mechanism Hardware + Software Continuous Application Dependent Reset the Device <1μs Estimation Permanent or Transient
ADC3 ADC Trigger Overflow Safety Mechanism Hardware Continuous Application Dependent Generate an interrupt <100 bus clock cycles Estimation Permanent or Transient
ADC4 ADC Window Comparator Safety Mechanism Hardware Continuous Application Dependent Generate an interrupt <100 bus clock cycles Estimation Permanent or Transient
ADC5 Test of Window Comparator Test for Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
ADC6 ADC Trigger or Output Plausibility Check Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
COMP1 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
COMP3 External Pin Input to COMP Safety Mechanism System Level Diagnostic Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
COMP4 Comparator Hysteresis Fault Avoidance Hardware Continuous Application Dependent N/A N/A N/A N/A
CPU1 ARM® Software Test Library Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Injection Permanent
CPU2 Write or Read Back of Data to Different Regions of Memory to Detect Faults in the Bus Interconnect Components Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
SYSCTL11 Boot Process Timeout Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Reset the Device 10 bus clock cycles Estimation Permanent or Transient
CPU3 Software Diversified Redundancy Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
CPU4 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
CRC CRC Checker Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
CRC1 Periodic Software Read Back of Static Configuration Registers Test for Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
DMA1 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
DMA2 Software DMA Transfer Test Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
DMA3 Software DMA Channel Test Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
DMA4 CRC Check of the Transferred Data Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
EVENT1 Periodic Software Readback of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
GPIO3 GPIO Multiple (Redundant) Inputs/Outputs Safety Mechanism Hardware + Software Continuous Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
FXBAR2 Periodic Software Read Back of Flash Data Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent
FLASH1 Flash ECC Checker Safety Mechanism Hardware Continuous Application Dependent Generate an interrupt <100 bus clock cycles Calculation Permanent or Transient
FLASH2 Flash CRC Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
FXBAR3 Software Test of ECC Checker Logic Test for Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
FXBAR4 Write Protection of Flash Safety Mechanism Hardware Continuous Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
GPIO1 Online Monitoring Using I/O Loopback Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
GPIO2 Periodic Software Readback of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
TIM1 Test for Basic PWM Generation Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
TIM2 Periodic Software Read Back of IP Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
TIM3 Test for Fault Generation Test for Safety Mechanism System Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
TIM4 Fault Detection to Take the PWMs to Safe State Safety Mechanism Hardware + Software Continuous Application Dependent Refer to Section 4.2 <100 bus clock cycles Estimation Permanent or Transient
TIM5 Input Capture on Two or More Timer Instances Safety Mechanism Hardware Continuous Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
TIM6 Timer Period Monitoring Safety Mechanism Hardware + Software Continuous Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
I2C1 Software Test of Function Using I/O Loopback Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
I2C2 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
I2C3 Information Redundancy Techniques Including End-to-End Safing Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
I2C4 Transmission Redundancy Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Transient
I2C5 Timeout Monitoring Safety Mechanism | Test of Safety Mechanism Software Continuous Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
I2C6 Test of CRC Function Test for Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
I2C7 Packet Error Check in SMBUS Mode Fault Avoidance N/A Continuous Application Dependent N/A N/A N/A N/A
IOMUX1 Periodic Software Readback of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
IOMUX2 IOMUX Coverage as Part of Other IP Safety Mechanisms. Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
SPI1 Software Test of Function Using I/O Loopback Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
SPI2 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
SPI3 SPI Periodic Safety Message Checks Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
SPI4 Information Redundancy Techniques Including End-to-End Safing Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
SPI5 Transmission Redundancy Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Transient
SYSCTL1 MCLK Monitor Safety Mechanism Hardware + Software Continuous Application Dependent Reset the Device <1μs Estimation Permanent or Transient
SYSCTL2 HFCLK Start-up Monitor Fault Avoidance Hardware Periodic or On-Demand Application Dependent N/A N/A N/A N/A
SYSCTL3 LFCLK Monitor Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Generate an interrupt <100 bus clock cycles Estimation Permanent or Transient
SYSCTL5 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
SYSCTL8 Brownout Reset (BOR) Supervisor Safety Mechanism Hardware Periodic or On-Demand Application Dependent Generate an interrupt <100 bus clock cycles Estimation Permanent
SYSCTL9 Clock Frequency Measurement Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
SYSCTL10 External Voltage Monitor Safety Mechanism System Level Diagnostic Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent
SYSCTL14 Brownout Voltage Monitor Safety Mechanism Hardware Periodic or On-Demand Application Dependent Reset the Device <1μs Estimation Permanent
SYSCTL15 External Voltage Supervisor Safety Mechanism System Level Diagnostic Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
SYSCTL16 External Watchdog Timer Safety Mechanism System Level Diagnostic Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
SYSMEM1 Software Read of Memory DMA Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
SYSMEM2 Software Read of Memory CPU Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
SYSMEM8 ECC Logic test Test for Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
SYSMEM7 RAM ECC Safety Mechanism Hardware Continuous Application Dependent Generate an interrupt <100 bus clock cycles Calculation Permanent or Transient
SYSMEM9 RAM Software Test Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
UART1 Software Test of Function Using I/O Loopback Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
UART2 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
UART3 Information Redundancy Techniques Including End-to-End Safing Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent or Transient
UART4 Transmission Redundancy Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Transient
UART5 Timeout Monitoring Safety Mechanism | Test of Safety Mechanism Software Continuous Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
UART6 UART Error Flags Safety Mechanism Hardware Continuous Application Dependent Generate an interrupt. <100 bus clock cycles Estimation Permanent or Transient
UART7 UART Glitch Filter Fault Avoidance Hardware Continuous Application Dependent N/A N/A N/A N/A
REF1 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
REF2 VREF to ADC Reference Input Safety Mechanism Hardware + Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Permanent
WDT1 Periodic Software Read Back of Static Configuration Registers Test for Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Latent
WDT2 WWDT Counter Check Test for Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
WDT3 WWDT Software Test Test for Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
WDT4 Redundant Watchdog Test for Safety Mechanism Hardware + Software Continuous Application Dependent Refer to Section 4.2 Application Dependent Insertion Latent
VBAT2 Periodic Software Read Back of Static Configuration Registers Safety Mechanism Software Periodic or On-Demand Application Dependent Refer to Section 4.2 Application Dependent Estimation Permanent or Transient
VBAT1 Brownout Reset (BOR) Supervisor Safety Mechanism Hardware + Software Continuous Application Dependent Generate an interrupt <100 bus clock cycles Estimation Permanent