SLAAED5A June 2023 – September 2025 AFE11612-SEP , OPA4H199-SEP
The VDRAIN protection circuit uses NMOS and PMOS transistors to disable the voltage being applied to the PA drain. This PA_ON circuit functions as a high-voltage switch. The VDRAIN needs to be disabled at key times during startup, shutdown, and alarm events. This is achieved in this design by an NMOS and PMOS circuit. When the PA_ON voltage is applied to the NMOS gate, the circuit turns on to allow VDRAIN through the PMOS.