SLAAED5A June   2023  – September 2025 AFE11612-SEP , OPA4H199-SEP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. LDMOS and GaN Power Amplifier FET PA Basics
  5. VGS Compensation
  6. Sequencing
  7. An Integrated PA Biasing Solution
  8. Negative Biasing for GaN PAs
  9. Fast Switching for TDD Applications
  10. VDRAIN Switching Circuit
  11. Controlled Gate-Sequencing Circuit
  12. VDRAIN Monitoring
  13. 10External Negative Power Supply Monitoring
  14. 11PA Temperature Monitoring
  15. 12Summary
  16. 13References
  17. 14Revision History

Negative Biasing for GaN PAs

The AFE11612-SEP has an internal 2.5V reference that scales the DAC output range from 0V to 5V. GaN PAs require negative gate voltage to be properly biased, with pinch-off voltages being more negative than the on voltages. The DAC output can be shifted to a negative voltage through the use of a differential op-amp circuit. The circuit example in Figure 5-1 uses the radiation hardened op-amp OPA4H199-SEP to offset and scale the DAC output to the negative range. A differential op-amp circuit is used to protect the PA in case of an alarm shutdown. In an alarm state, the DAC drives the voltage to 0V. The differential circuit outputs the most negative voltage to the GaN gate, thus ensuring the GaN PA turns off.

 Differential Operational
                    Amplifier Circuit Figure 5-1 Differential Operational Amplifier Circuit

Resistor values are chosen based on the desired op-amp output, VIN, and DAC range. The following equations provide a guideline for selecting the resistor values:

Equation 1. VGS= -VIN× R2R1+DAC×R4R4+R3×R1+R2R1

When DAC = 0V:

Equation 2. VGS(MIN)= -VIN× R2R1

VGS(MIN) is selected to be –7.5V, and VIN is selected to be 5V.

Equation 3. -7.5V= -5× R2R1
Equation 4. R2R1=1.5

Select R2 and R1 values in accordance with this ratio. In this example, R1 = 10kΩ and R2 = 15kΩ. To calculate R3 and R4, use the maximum desired DAC value and VGS value. In this example, DAC = 5V, and VGS(MAX) = 0V.

Equation 5. VGS(MAX)= -VIN× R2R1+DAC×R4R4+R3R1+R2R1
Equation 6. 0= -5× 15k10k+5×R4R4+R3×10k+15k10k
Equation 7. 7.5= 12.5×R4R4+R3

Reducing the equation gives the resistor ratio in Equation 8.

Equation 8. R4R3=1.5

Since this is the same ratio as R2/R1, the same values will be used for R3 and R4 : R3 = 10kΩ and R4 = 15kΩ. Figure 5-2 shows the DAC vs VGS output with these resistor values.

 Differential Operational
                    Amplifier Output Figure 5-2 Differential Operational Amplifier Output