SLAAER4 March   2025 AFE781H1 , AFE782H1 , AFE881H1 , AFE882H1 , DAC8740H , DAC8741H , DAC8742H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 The 4-20mA Loop
    2. 1.2 The HART Protocol
      1. 1.2.1 Adding HART to the 4-20mA Loop
      2. 1.2.2 HART FSK
  5. 2AFE882H1 EVM-Based HART Transmitter
    1. 2.1 AFE882H1 HART Modem
    2. 2.2 AFE882H1 Evaluation Module
    3. 2.3 HART Transmitter Construction
      1. 2.3.1 Detailed Schematic
        1. 2.3.1.1 Input Protection
        2. 2.3.1.2 Start Up With Low-Dropout Regulator
        3. 2.3.1.3 Voltage-to-Current Stage
        4. 2.3.1.4 Voltage-to-Current Calculation
        5. 2.3.1.5 HART Signal Transmission
        6. 2.3.1.6 HART Input Protection
        7. 2.3.1.7 HART Transmitter Board
        8. 2.3.1.8 Current Consumption
      2. 2.3.2 HART Protocol Stack
  6. 3HART Testing and Registration
    1. 3.1  HART History and the FieldComm Group
    2. 3.2  HART Testing Overview
      1. 3.2.1 HART Protocol Specifications
      2. 3.2.2 HART Protocol Test Specifications
      3. 3.2.3 Field Transmitter Device Testing
    3. 3.3  HART Test Equipment
    4. 3.4  HART Physical Layer Testing
      1. 3.4.1 FSK Sinusoid Test
      2. 3.4.2 Carrier Start and Stop Time Tests
      3. 3.4.3 Carrier Start and Stop Transient Tests
      4. 3.4.4 Output Noise During Silence
      5. 3.4.5 Analog Rate of Change Test
      6. 3.4.6 Receive Impedance Test
      7. 3.4.7 Noise Sensitivity Test
      8. 3.4.8 Carrier Detect Test
    5. 3.5  Data Link Layer Tests
      1. 3.5.1 Data Link Layer Test Specifications
      2. 3.5.2 Data Link Layer Test Logs
    6. 3.6  Universal Command Tests
    7. 3.7  Common-Practice Command Tests
    8. 3.8  Device Specific Command Tests
    9. 3.9  HART Protocol Test Submission
    10. 3.10 HART Registration
  7. 4Summary
  8. 5Acknowledgments
  9. 6References

1.2.2 HART FSK

HART communication uses an FSK signal to create digital bits in the communication. The modem modulates two different frequencies for bits that become the 0 or 1 in the digital communications. This digital communication is similar to UART in byte structure using 8 data bits, odd parity, and 1 stop bit. Figure 1-3 shows a representation of the instantaneous current in the loop with a HART modulated signal. This HART signal is superimposed onto the 4-20mA current that represents the primary variable.

The HART FSK Modulated Onto the 4-20mA Current LoopFigure 1-3 The HART FSK Modulated Onto the 4-20mA Current Loop

Transmitters often operate on the loop power. Because the loop’s zero scale is 4mA and currents below 3.6mA represent errors, the transmitter must operate with a maximum current budget of 3mA. The current budget is shown in the shaded section at the bottom of Figure 1-3.

Bits for HART transmissions are represented as two FSK signals. Different frequencies represent 1s and 0s. A 1200Hz signal is a digital 1 and a 2200Hz signal is a digital 0. The data is sent at 1200 baud so each bit is 833µs. The primary variable is sent as the current in the loop. This current operates at a low frequency below 20Hz. Figure 1-4 shows the frequency bands used for the primary variable and the HART FSK frequencies.

The Primary Variable and HART Frequency Bands the 4-20mA Current LoopFigure 1-4 The Primary Variable and HART Frequency Bands the 4-20mA Current Loop

Because the primary variable and the HART signal share the same transmission, the signals must be filtered to be received. The frequency content of the primary variable and the HART signal are shown by the shaded area and the two arrows.

In the HART-enabled receiver, the primary variable is read using a low-pass filter to measure the voltage across a resistor. This signal, represented as the shaded area of the figure, is generally under 20Hz so the low-pass filter has a cutoff frequency of about 25Hz. The HART transmits at a higher frequency, with the FSK bits at 1200Hz and 2200Hz. This HART signal is received using a band-pass filter that typically operates from 500Hz to 10kHz.