SLAAER4 March   2025 AFE781H1 , AFE782H1 , AFE881H1 , AFE882H1 , DAC8740H , DAC8741H , DAC8742H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 The 4-20mA Loop
    2. 1.2 The HART Protocol
      1. 1.2.1 Adding HART to the 4-20mA Loop
      2. 1.2.2 HART FSK
  5. 2AFE882H1 EVM-Based HART Transmitter
    1. 2.1 AFE882H1 HART Modem
    2. 2.2 AFE882H1 Evaluation Module
    3. 2.3 HART Transmitter Construction
      1. 2.3.1 Detailed Schematic
        1. 2.3.1.1 Input Protection
        2. 2.3.1.2 Start Up With Low-Dropout Regulator
        3. 2.3.1.3 Voltage-to-Current Stage
        4. 2.3.1.4 Voltage-to-Current Calculation
        5. 2.3.1.5 HART Signal Transmission
        6. 2.3.1.6 HART Input Protection
        7. 2.3.1.7 HART Transmitter Board
        8. 2.3.1.8 Current Consumption
      2. 2.3.2 HART Protocol Stack
  6. 3HART Testing and Registration
    1. 3.1  HART History and the FieldComm Group
    2. 3.2  HART Testing Overview
      1. 3.2.1 HART Protocol Specifications
      2. 3.2.2 HART Protocol Test Specifications
      3. 3.2.3 Field Transmitter Device Testing
    3. 3.3  HART Test Equipment
    4. 3.4  HART Physical Layer Testing
      1. 3.4.1 FSK Sinusoid Test
      2. 3.4.2 Carrier Start and Stop Time Tests
      3. 3.4.3 Carrier Start and Stop Transient Tests
      4. 3.4.4 Output Noise During Silence
      5. 3.4.5 Analog Rate of Change Test
      6. 3.4.6 Receive Impedance Test
      7. 3.4.7 Noise Sensitivity Test
      8. 3.4.8 Carrier Detect Test
    5. 3.5  Data Link Layer Tests
      1. 3.5.1 Data Link Layer Test Specifications
      2. 3.5.2 Data Link Layer Test Logs
    6. 3.6  Universal Command Tests
    7. 3.7  Common-Practice Command Tests
    8. 3.8  Device Specific Command Tests
    9. 3.9  HART Protocol Test Submission
    10. 3.10 HART Registration
  7. 4Summary
  8. 5Acknowledgments
  9. 6References

2.3.1.4 Voltage-to-Current Calculation

As previously calculated in Equation 5, the loop current is shown as a sum of the current through the paths to LOOP–. This total current is a function of the DAC code and the reference voltage. With a static reference voltage, the DAC code sets the magnitude of the current through the loop.

Equation 6. ILOOP– = 1001 × [(VOUT / 120kΩ) + (1.25V / 412kΩ)]
Equation 7. ILOOP– = 1001 × {[(DAC_CODE / 216) × 2.5V] + (1.25V / 412kΩ)}

Table 2-1 shows different DAC code values and how the values map to the loop current in milliamps. Loop currents 3.375mA and 21.75mA are chosen as the sensor error indicator levels.

Table 2-1 DAC Code Values Converted to Voltage Output and Loop Current Setting
OUTPUT CONDITIONDAC CODEDAC OUTPUT (V)LOOP CURRENT (mA)
DAC minimum0x000003.037
Error low0x04260.040513.375
In-range minimum0x0BD20.11544
In-range mid-scale0x6E071.074512
In-range maximum0xD03C2.033520
Error high0xE5B72.243321.75
DAC maximum0xFFFF2.523.891