SLASFJ6A July   2025  – September 2025 MSPM0C1105 , MSPM0C1106

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      10
    3. 6.3 Signal Descriptions
      1.      12
      2.      13
      3.      14
      4.      15
      5.      16
      6.      17
      7.      18
      8.      19
      9.      20
      10.      21
      11.      22
      12.      23
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 Low Frequency Crystal/Clock
      4. 7.9.4 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1 Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Electrical Characteristics
      2. 7.14.2 Voltage Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 I2C
      1. 7.16.1 I2C Characteristics
      2. 7.16.2 I2C Filter
      3. 7.16.3 I2C Timing Diagram
    17. 7.17 SPI
      1. 7.17.1 SPI
      2. 7.17.2 SPI Timing Diagram
    18. 7.18 UART
    19. 7.19 TIMx
    20. 7.20 Emulation and Debug
      1. 7.20.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode
    4. 8.4  Power Management Unit (PMU)
    5. 8.5  Clock Module (CKM)
    6. 8.6  DMA_B
    7. 8.7  Events
    8. 8.8  Memory
      1. 8.8.1 Memory Organization
      2. 8.8.2 Peripheral File Map
      3. 8.8.3 Peripheral Interrupt Vector
    9. 8.9  Flash Memory
    10. 8.10 SRAM
    11. 8.11 GPIO
    12. 8.12 IOMUX
    13. 8.13 ADC
    14. 8.14 Temperature Sensor
    15. 8.15 Low-Frequency Sub System (LFSS)
    16. 8.16 VREF
    17. 8.17 COMP
    18. 8.18 Security
    19. 8.19 CRC
    20. 8.20 UART
    21. 8.21 I2C
    22. 8.22 SPI
    23. 8.23 IWDT
    24. 8.24 WWDT
    25. 8.25 RTC_B
    26. 8.26 Timers (TIMx)
    27. 8.27 Device Analog Connections
    28. 8.28 Input/Output Diagrams
    29. 8.29 Serial Wire Debug Interface
    30. 8.30 DEBUGSS
    31. 8.31 Device Factory Constants
    32. 8.32 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.9.4 High Frequency Crystal/Clock

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
High frequency crystal oscillator (HFXT)
fHFXT HFXT frequency HFXTRSEL=00 4 8 MHz
fHFXT HFXT frequency HFXTRSEL=01 8.01 16 MHz
fHFXT HFXT frequency HFXTRSEL=10 16.01 32 MHz
DCHFXT HFXT duty cycle HFXTRSEL=00 40 65 %
DCHFXT HFXT duty cycle HFXTRSEL=01 40 60 %
DCHFXT HFXT duty cycle HFXTRSEL=10 40 60 %
OAHFXT HFXT crystal oscillation allowance HFXTRSEL=00 (4 to 8MHz range) 2 kΩ
CL, eff Integrated effective load capacitance (1) 1 pF
tstart, HFXT HFXT start-up time(2) HFXTRSEL=11,  32MHz crystal 0.5 ms
IHFXT HFXT current consumption(2) fHFXT=4MHz, Rm=300Ω, CL=12pF 100 uA
IHFXT HFXT current consumption(2) fHFXT=32MHz, Rm=30Ω, CL=12pF, Cm=6.26fF, Lm=1.76mH 600 uA
High frequency digital clock input (HFCLK_IN)
fHFIN HFCLK_IN frequency (3) USEEXTHFCLK=1 4 32 MHz
DCHFIN HFCLK_IN duty cycle (3) USEEXTHFCLK=1 40 60 %
(1) This includes parasitic bond and package capacitance (≈2pF per pin), calculated as CHFXIN×CHFXOUT/(CHFXIN+CHFXOUT), where CHFXIN and CHFXOUT are the total capacitance at HFXIN and HFXOUT, respectively.
(2) The HFXT startup time (tstart, HFXT) is measured from the time the HFXT is enabled until stable oscillation for a typical crystal.  Start-up time is dependent upon crystal frequency and crystal specifications. Current consumption increases with higher RSEL and start up time is decreases with higher RSEL.
(3) The digital clock input (HFCLK_IN) accepts a logic level square wave clock.