SLAU858B December   2023  – June 2025 AFE881H1

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
  6. 2Hardware
    1. 2.1 Hardware Description
      1. 2.1.1 Theory of Operation
      2. 2.1.2 Signal Definitions
    2. 2.2 Hardware Setup
      1. 2.2.1 Electrostatic Discharge Caution
      2. 2.2.2 Power Configuration and Jumper Settings
      3. 2.2.3 Connecting the Hardware
        1. 2.2.3.1 Power Configuration
        2. 2.2.3.2 External SPI and UART Controllers
  7. 3Software
    1. 3.1 Software Setup
    2. 3.2 Software Description
      1. 3.2.1 Starting the Software
      2. 3.2.2 Software Features
        1. 3.2.2.1 High Level Configuration Page
        2. 3.2.2.2 AFE881H1 Register Page
  8. 4Hardware Design Files
    1. 4.1 Board Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Related Documentation
  11. 7Revision History

2.2.2 Power Configuration and Jumper Settings

The AFE881H1EVM provides electrical connections to the device supply pins. Table 2-3 shows the connections.

Table 2-3 summarizes all of the EVM jumper functionality.

Table 2-3 AFE881H1EVM Power Supply Inputs
Terminal Name Function
J15 PVDD Optional external PVDD power supply (disconnect J21 when using external supply)
J16 GND Ground connection
J17 IOVDD Optional external IOVDD power supply (disconnect J20 when using external supply)
J18 VDD Optional external VDD power supply (disconnect J21 or move the shunt to Float when using an external supply)

The jumper settings on the AFE881H1EVM are crucial to the proper operation of the EVM. Table 2-4 provides the details of the configurable jumper settings on the EVM. Figure 2-2 defines the AFE881H1EVM show the default jumper connections on the board.

Table 2-4 AFE881H1EVM Jumper Summary
Header Name Function
J2 HART_IN

Short 1-2 – HART receiver input set to internal filter (default)

Short 2-3 – HART receiver input set to external filter
J3 REF_EN

Short 1-2 – REF_EN connected to ground, disable internal reference

Open – REF_EN connected to IOVDD through pullup resistor, enable internal reference (default)
J4 RX_INF

Short 1-2 – RX_IN connected to 680pF for internal filter (default)

Short 2-3 – RX_INF set to external filter
J9 POL_SEL

Short 1-2 – POL_SEL set alarm voltage high (default)

Short 2-3 – POL_SEL set alarm voltage low
J19 DISABLE

Short 1-2 – FTDI SPI level shifter disabled

Open 1-2 – FTDI SPI level shifter enabled (default)

Short 3-4 – FTDI UART level shifter disabled

Open 3-4 – FTDI UART level shifter enabled (default)

Short 5-6 – FTDI RESET level shifter disabled

Open 5-6 – FTDI RESET level shifter enabled (default)
J20 IOVDD

Short 1-2 – IOVDD supplied through 3.3V USB power

Short 2-3 – IOVDD supplied through 1.8V USB power (default)

Open – IOVDD supplied through J17
J21 PVDD_VDD

Short 1-3 – PVDD supplied through 1.8V USB power

Short 2-4 – VDD supplied through 1.8V USB power (only if PVDD = 1.8V)

Short 3-4 – PVDD and VDD shorted for single external 1.8V connection to either J15 or J18

Short 3-5 – PVDD supplied through 3.3V USB power (default)

Short 4-6 – VDD supplied internally from AFE881H1(default)

Open – PVDD and VDD supplied externally through J15 and J18
AFE881H1EVM Default Header Settings for the AFE881H1EVM Figure 2-2 Default Header Settings for the AFE881H1EVM