SLAZ709A October 2017 – June 2025 MSP432E401Y , MSP432E411Y
Application code may miss new tamper event during clear
During the clear of a tamper event, a new tamper event could be missed or the tamper log could be corrupted. The clear of a tamper event starts with the Tamper Clear (TPCLR) bit in the HIB Tamper Control register (HIBTPCTL) being written. The write takes 3 rising edges of the 32.768-kHz clock to complete the clear.
To prevent missing a tamper event during these three Hibernate clock cycles and restoring the tamper log to its reset state, workaround code must be implemented in the NMI handler as shown in Section 1.6. The new DriverLib APIs mentioned in Section 1.6 are included in the SimpleLink MSP432E4 SDK.