SLLA662 March   2025 MCF8315A , MCF8315C , MCF8315C-Q1 , MCF8315D , MCF8316A , MCF8316C-Q1 , MCF8316D , MCF8329A , MCT8315A , MCT8316A , MCT8329A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2I2C Related Details for MCx83xx Family
    1. 2.1 TARGET_ID
    2. 2.2 CRC_EN
      1. 2.2.1 CRC Computational Details
    3. 2.3 MEM_SEC, MEM_PAGE, and MEM_ADDR
  6. 3I2C Secondary Device Feature Supported by MCx83xx Family
    1. 3.1 Clock Stretching
  7. 4Primary Device Read and Write Expected Flow
    1. 4.1 Read Sequence
    2. 4.2 Write Sequence
  8. 5Summary
  9. 6References

2.2.1 CRC Computational Details

Following details needs to be taken care while computing CRC on the primary device side:

  1. An 8-bit CCITT polynomial is used for CRC computation as shown in Equation 1
    Equation 1. ( x 8 + x 2 + x + 1 )  
  2. The CRC value to be initialized to 0xFF.
  3. The CRC computation starts from Target ID + write bit byte and continue till end of data bytes.
  4. Within a byte the CRC is computed in a bit by bit manner starting with MSB bit of the input byte.
  5. Example to verify correctness of CRC computation
    1. For input byte of 0x12, the CRC byte becomes 0x8D from the initial value of 0xFF.