SLLA662 March   2025 MCF8315A , MCF8315C , MCF8315C-Q1 , MCF8315D , MCF8316A , MCF8316C-Q1 , MCF8316D , MCF8329A , MCT8315A , MCT8316A , MCT8329A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2I2C Related Details for MCx83xx Family
    1. 2.1 TARGET_ID
    2. 2.2 CRC_EN
      1. 2.2.1 CRC Computational Details
    3. 2.3 MEM_SEC, MEM_PAGE, and MEM_ADDR
  6. 3I2C Secondary Device Feature Supported by MCx83xx Family
    1. 3.1 Clock Stretching
  7. 4Primary Device Read and Write Expected Flow
    1. 4.1 Read Sequence
    2. 4.2 Write Sequence
  8. 5Summary
  9. 6References

1 Introduction

I2C involves two communication lines, serial clock line (SCL) over which the primary device sends clock signal and serial data line (SDA) which primary device uses for either reading a data (from secondary device address) or writing a data (to the secondary device address). Because of high power-efficiency and easy implementation, I2C has been adopted within all the devices of MCx83xx family.

This article includes details on- I2C for the MCx83xx family as follows:

  • MCF8315A
  • MCF8315C
  • MCF8315C-Q1
  • MCF8316A
  • MCF8316C
  • MCF8316C-Q1
  • MCF8315D
  • MCF8316D
  • MCF8329A
  • MCT8316A
  • MCT8315A
  • MCT8329A