SLOS187A February   1997  – July 2025 TLV2322 , TLV2324

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Dissipation Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Electrical Characteristics, TLV2322
    5. 5.5  Operating Characteristics TLV2322, VDD = 3V
    6. 5.6  Operating Characteristics, TLV2322, VDD = 5V
    7. 5.7  Electrical Characteristics, TLV2324
    8. 5.8  Operating Characteristics, TLV2324, VDD = 3V
    9. 5.9  Operating Characteristics, TLV2324, VDD = 5V
    10. 5.10 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 Single-Supply Versus Split-Supply Test Circuits
    2. 6.2 Input Bias Current
    3. 6.3 Low-level Output Voltage
    4. 6.4 Input Offset Voltage Temperature Coefficient
    5. 6.5 Full-Power Response
    6. 6.6 Test Time
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Single-Supply Operation
      2. 7.1.2 Input Characteristics
      3. 7.1.3 Noise Performance
      4. 7.1.4 Feedback
      5. 7.1.5 Electrostatic-Discharge Protection
      6. 7.1.6 Latch-Up
      7. 7.1.7 Output Characteristics
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Output Characteristics

The output stage of the TLV232x is designed to sink and source relatively high amounts of current (see Section 5.10). If the output is subjected to a short-circuit condition, this high-current capability is able to cause device damage under certain conditions. Output current capability increases with supply voltage.

Although the TLV232x possess excellent high-level output voltage and current capability, methods are available to boost this capability, if needed. The simplest method uses a pullup resistor (RP) connected from the output to the positive supply rail (see Figure 7-6). Using this circuit has two disadvantages. First, the NMOS pulldown transistor sinks a comparatively large amount of current. In this circuit, the pulldown transistor behaves like a linear resistor with an on-resistance between approximately 60Ω and 180Ω, depending on how hard the operational amplifier input is driven. With very low values of RP, a voltage offset from 0V at the output occurs. Secondly, pullup resistor RP acts as a drain load to the pulldown transistor. Thus, the gain of the op amp is reduced at output voltage levels where the corresponding pullup transistor is not supplying the output current.

TLV2322 TLV2324 Resistive Pullup to Increase
                        vOH
                Figure 7-6 Resistive Pullup to Increase vOH
TLV2322 TLV2324 Test Circuit for Output
                    Characteristics Figure 7-7 Test Circuit for Output Characteristics

All operating characteristics of the TLV232x are measured using a 20pF load. The device drives higher capacitive loads. However, as output load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 7-7 and Figure 7-8). In many cases, adding some compensation in the form of a series resistor in the feedback loop alleviates the problem.

TLV2322 TLV2324 Effect of Capacitive
                    Loads Figure 7-8 Effect of Capacitive Loads