SLUSBX9J March   2014  – October 2026 TPS23861

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Detailed Pin Description
      2. 6.1.2 I2C Detailed Pin Description
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Detection Resistance Measurement
      2. 6.3.2  Physical Layer Classification
      3. 6.3.3  Class and Detect Fields
      4. 6.3.4  Register State Following a Fault
      5. 6.3.5  Disconnect
      6. 6.3.6  Disconnect Threshold
      7. 6.3.7  Fast Shutdown Mode
      8. 6.3.8  Legacy Device Detection
      9. 6.3.9  VPWR Undervoltage and UVLO Events
      10. 6.3.10 Timer-Deferrable Interrupt Support
      11. 6.3.11 A/D Converter and I2C Interface
      12. 6.3.12 Independent Operation when the AUTO Bit is Set
      13. 6.3.13 I2C Slave Address and AUTO Bit Programming
    4. 6.4 Device Functional Modes
      1. 6.4.1 Off
      2. 6.4.2 Manual
      3. 6.4.3 Semi-Auto
      4. 6.4.4 Auto
      5. 6.4.5 Push-Button Power On Response
      6. 6.4.6 TSTART Indicators of Detect and Class Failures
      7. 6.4.7 Device Power On Initialization
    5. 6.5 Register Map – I2C-Addressable
      1. 6.5.1  Interrupt Register
      2. 6.5.2  Interrupt Enable Register
      3. 6.5.3  Power Event Register
      4. 6.5.4  Detection Event Register
      5. 6.5.5  Fault Event Register
      6. 6.5.6  Start/ILIM Event Register
      7. 6.5.7  Supply Event Register
      8. 6.5.8  Port n Status Register
        1. 6.5.8.1 Port 1 Status Register
        2. 6.5.8.2 Port 2 Status Register
        3. 6.5.8.3 Port 3 Status Register
        4. 6.5.8.4 Port 4 Status Register
      9. 6.5.9  Power Status Register
      10. 6.5.10 I2C Slave Address Register
      11. 6.5.11 Operating Mode Register
      12. 6.5.12 Disconnect Enable Register
      13. 6.5.13 Detect/Class Enable Register
      14. 6.5.14 Port Power Priority Register
      15. 6.5.15 Timing Configuration Register
      16. 6.5.16 General Mask 1 Register
      17. 6.5.17 Detect/Class Restart Register
      18. 6.5.18 Power Enable Register
      19. 6.5.19 Reset Register
      20. 6.5.20 Legacy Detect Mode Register
      21. 6.5.21 Two-Event Classification Register
      22. 6.5.22 Interrupt Timer Register
      23. 6.5.23 Disconnect Threshold Register
        1. 6.5.23.1 Bits Description
      24. 6.5.24 ICUTnm CONFIG Register
        1. 6.5.24.1 ICUT21 CONFIG Register
        2. 6.5.24.2 ICUT43 CONFIG Register
        3. 6.5.24.3 Bits Description
      25. 6.5.25 Temperature Register
      26. 6.5.26 Input Voltage Register
      27. 6.5.27 Port n Current Register
        1. 6.5.27.1 Port 1 Current Register
        2. 6.5.27.2 Port 2 Current Register
        3. 6.5.27.3 Port 3 Current Register
        4. 6.5.27.4 Port 4 Current Register
      28. 6.5.28 Port n Voltage Register
        1. 6.5.28.1 Port 1 Voltage Register
        2. 6.5.28.2 Port 2 Voltage Register
        3. 6.5.28.3 Port 3 Voltage Register
        4. 6.5.28.4 Port 4 Voltage Register
      29. 6.5.29 PoE Plus Register
      30. 6.5.30 Firmware Revision Register
      31. 6.5.31 I2C Watchdog Register
      32. 6.5.32 Device ID Register
      33. 6.5.33 Cool Down/Gate Drive Register
      34. 6.5.34 Port n Detect Resistance Register
        1. 6.5.34.1 Port 1 Detect Resistance Register
          1. 6.5.34.1.1 Port 2 Detect Resistance Register
          2. 6.5.34.1.2 Port 3 Detect Resistance Register
          3. 6.5.34.1.3 Port 4 Detect Resistance Register
      35. 6.5.35 Port n Detect Voltage Difference Register
        1. 6.5.35.1 Port 1 Detect Voltage Difference Register
        2. 6.5.35.2 Port 2 Detect Voltage Difference Register
        3. 6.5.35.3 Port 3 Detect Voltage Difference Register
        4. 6.5.35.4 Port 4 Detect Voltage Difference Register
      36. 6.5.36 Reserved Registers
  8. 7 Application and Implementation
    1. 7.1 Introduction to PoE
    2. 7.2 Application Information
      1. 7.2.1 Kelvin Current Sensing Resistor
      2. 7.2.2 Connections on Unused Ports
    3. 7.3 Typical Application
      1. 7.3.1 Two Port, Auto Mode Application with External Port Reset
        1. 7.3.1.1 Design Requirements
      2. 7.3.2 Four Port, Auto Mode Application
        1. 7.3.2.1 Design Requirements
      3. 7.3.3 Eight Port, Semi-Auto Mode Application Using MSP430 Micro-Controller
        1. 7.3.3.1 Design Requirements
      4. 7.3.4 Detailed Design Procedure
        1. 7.3.4.1 Power Pin Bypass Capacitors
        2. 7.3.4.2 Per Port Components
        3. 7.3.4.3 System Level Components (not shown in the schematic diagrams)
      5. 7.3.5 Application Curves
    4. 7.4 System Examples
      1. 7.4.1 Overcurrent and Overload Protection
      2. 7.4.2 Inrush Protection
      3. 7.4.3 ICUT Current Limit
      4. 7.4.4 Foldback Protection (ILIM)
      5. 7.4.5 Kelvin Current Sensing Resistor
    5. 7.5 Power Supply Recommendations
      1. 7.5.1 VDD
      2. 7.5.2 VPWR
      3. 7.5.3 VPWR-RESET Sequencing
    6. 7.6 Layout
      1. 7.6.1 Layout Guidelines
        1. 7.6.1.1 Port Current Kelvin Sensing
      2. 7.6.2 Layout Example
        1. 7.6.2.1 Component Placement and Routing Guidelines
          1. 7.6.2.1.1 Power Pin Bypass Capacitors
          2. 7.6.2.1.2 Per-Port Components
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.8 Typical Characteristics

TPS23861 VDD UVLO vs Junction Temperature
Figure 5-7 VDD UVLO vs Junction Temperature
TPS23861 DC Disconnect vs Junction Temperature
Figure 5-9 DC Disconnect vs Junction Temperature
TPS23861 VPWR Current vs VPWR
Figure 5-11 VPWR Current vs VPWR
TPS23861 Inrush Current Limit Threshold vs Port Voltage
Figure 5-13 Inrush Current Limit Threshold vs Port Voltage
TPS23861 Current Limit (2x threshold) vs Junction Temperature
Figure 5-15 Current Limit (2x threshold) vs Junction Temperature
TPS23861 Valid PD Detection (25kΩ and 0.1 µF) and CLASS 0 Classification
Figure 5-17 Valid PD Detection (25kΩ and 0.1 µF) and CLASS 0 Classification
TPS23861 Detection with Invalid PD (15kΩ and 0.1 µF)
Figure 5-19 Detection with Invalid PD (15kΩ and 0.1 µF)
TPS23861 Detection with Invalid PD (25kΩ and 10 µF)
Figure 5-21 Detection with Invalid PD (25kΩ and 10 µF)
TPS23861 Powering Up Into a 100-µF Load
Figure 5-23 Powering Up Into a 100-µF Load
TPS23861 All Ports Fast Shutdown
Figure 5-25 All Ports Fast Shutdown
TPS23861 Rapid Response to a 1Ω Short: 802.3af Mode
Figure 5-27 Rapid Response to a 1Ω Short: 802.3af Mode
TPS23861 Response to a 50Ω Load: 802.3af Mode
Figure 5-29 Response to a 50Ω Load: 802.3af Mode
TPS23861 Current Limit Timeout: 802.3af Mode, 85Ω Load
Figure 5-31 Current Limit Timeout: 802.3af Mode, 85Ω Load
TPS23861 Inrush Fault Timeout: 100Ω Load
Figure 5-33 Inrush Fault Timeout: 100Ω Load
TPS23861 Response to 8mA to 6mA Load, DC Disconnect Enabled
Figure 5-35 Response to 8mA to 6mA Load, DC Disconnect Enabled
TPS23861 VPWR UVLO vs Junction Temperature
Figure 5-8 VPWR UVLO vs Junction Temperature
TPS23861 VDD Current vs VDD
Figure 5-10 VDD Current vs VDD
TPS23861 Current Limit (1x threshold) vs Junction Temperature
Figure 5-12 Current Limit (1x threshold) vs Junction Temperature
TPS23861 Current Limit Threshold vs FET Voltage
Figure 5-14 Current Limit Threshold vs FET Voltage
TPS23861 Classification Voltage vs Port Classification Current
Figure 5-16 Classification Voltage vs Port Classification Current
TPS23861 Valid PD Detection (25kΩ and 0.1 µF) and CLASS 3 Classification
Figure 5-18 Valid PD Detection (25kΩ and 0.1 µF) and CLASS 3 Classification
TPS23861 Detection with Invalid PD (open circuit)
Figure 5-20 Detection with Invalid PD (open circuit)
TPS23861 2-Event Class and Startup with Valid PD
Figure 5-22 2-Event Class and Startup with Valid PD
TPS23861 Semi-Auto Sequenced Turn On
Figure 5-24 Semi-Auto Sequenced Turn On
TPS23861 Overcurrent (ICUT) Timeout
Figure 5-26 Overcurrent (ICUT) Timeout
TPS23861 Rapid Response to a 1Ω Short: PoE+ Mode
Figure 5-28 Rapid Response to a 1Ω Short: PoE+ Mode
TPS23861 Response to a 25Ω Load: PoE+ Mode
Figure 5-30 Response to a 25Ω Load: PoE+ Mode
TPS23861 Current Limit 15ms Timeout: PoE+ Mode, 45Ω Load
Figure 5-32 Current Limit 15ms Timeout: PoE+ Mode, 45Ω Load
TPS23861 Current Limit Timeout Restart Delay
Figure 5-34 Current Limit Timeout Restart Delay