SLUSBX9J March   2014  – October 2026 TPS23861

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Detailed Pin Description
      2. 6.1.2 I2C Detailed Pin Description
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Detection Resistance Measurement
      2. 6.3.2  Physical Layer Classification
      3. 6.3.3  Class and Detect Fields
      4. 6.3.4  Register State Following a Fault
      5. 6.3.5  Disconnect
      6. 6.3.6  Disconnect Threshold
      7. 6.3.7  Fast Shutdown Mode
      8. 6.3.8  Legacy Device Detection
      9. 6.3.9  VPWR Undervoltage and UVLO Events
      10. 6.3.10 Timer-Deferrable Interrupt Support
      11. 6.3.11 A/D Converter and I2C Interface
      12. 6.3.12 Independent Operation when the AUTO Bit is Set
      13. 6.3.13 I2C Slave Address and AUTO Bit Programming
    4. 6.4 Device Functional Modes
      1. 6.4.1 Off
      2. 6.4.2 Manual
      3. 6.4.3 Semi-Auto
      4. 6.4.4 Auto
      5. 6.4.5 Push-Button Power On Response
      6. 6.4.6 TSTART Indicators of Detect and Class Failures
      7. 6.4.7 Device Power On Initialization
    5. 6.5 Register Map – I2C-Addressable
      1. 6.5.1  Interrupt Register
      2. 6.5.2  Interrupt Enable Register
      3. 6.5.3  Power Event Register
      4. 6.5.4  Detection Event Register
      5. 6.5.5  Fault Event Register
      6. 6.5.6  Start/ILIM Event Register
      7. 6.5.7  Supply Event Register
      8. 6.5.8  Port n Status Register
        1. 6.5.8.1 Port 1 Status Register
        2. 6.5.8.2 Port 2 Status Register
        3. 6.5.8.3 Port 3 Status Register
        4. 6.5.8.4 Port 4 Status Register
      9. 6.5.9  Power Status Register
      10. 6.5.10 I2C Slave Address Register
      11. 6.5.11 Operating Mode Register
      12. 6.5.12 Disconnect Enable Register
      13. 6.5.13 Detect/Class Enable Register
      14. 6.5.14 Port Power Priority Register
      15. 6.5.15 Timing Configuration Register
      16. 6.5.16 General Mask 1 Register
      17. 6.5.17 Detect/Class Restart Register
      18. 6.5.18 Power Enable Register
      19. 6.5.19 Reset Register
      20. 6.5.20 Legacy Detect Mode Register
      21. 6.5.21 Two-Event Classification Register
      22. 6.5.22 Interrupt Timer Register
      23. 6.5.23 Disconnect Threshold Register
        1. 6.5.23.1 Bits Description
      24. 6.5.24 ICUTnm CONFIG Register
        1. 6.5.24.1 ICUT21 CONFIG Register
        2. 6.5.24.2 ICUT43 CONFIG Register
        3. 6.5.24.3 Bits Description
      25. 6.5.25 Temperature Register
      26. 6.5.26 Input Voltage Register
      27. 6.5.27 Port n Current Register
        1. 6.5.27.1 Port 1 Current Register
        2. 6.5.27.2 Port 2 Current Register
        3. 6.5.27.3 Port 3 Current Register
        4. 6.5.27.4 Port 4 Current Register
      28. 6.5.28 Port n Voltage Register
        1. 6.5.28.1 Port 1 Voltage Register
        2. 6.5.28.2 Port 2 Voltage Register
        3. 6.5.28.3 Port 3 Voltage Register
        4. 6.5.28.4 Port 4 Voltage Register
      29. 6.5.29 PoE Plus Register
      30. 6.5.30 Firmware Revision Register
      31. 6.5.31 I2C Watchdog Register
      32. 6.5.32 Device ID Register
      33. 6.5.33 Cool Down/Gate Drive Register
      34. 6.5.34 Port n Detect Resistance Register
        1. 6.5.34.1 Port 1 Detect Resistance Register
          1. 6.5.34.1.1 Port 2 Detect Resistance Register
          2. 6.5.34.1.2 Port 3 Detect Resistance Register
          3. 6.5.34.1.3 Port 4 Detect Resistance Register
      35. 6.5.35 Port n Detect Voltage Difference Register
        1. 6.5.35.1 Port 1 Detect Voltage Difference Register
        2. 6.5.35.2 Port 2 Detect Voltage Difference Register
        3. 6.5.35.3 Port 3 Detect Voltage Difference Register
        4. 6.5.35.4 Port 4 Detect Voltage Difference Register
      36. 6.5.36 Reserved Registers
  8. 7 Application and Implementation
    1. 7.1 Introduction to PoE
    2. 7.2 Application Information
      1. 7.2.1 Kelvin Current Sensing Resistor
      2. 7.2.2 Connections on Unused Ports
    3. 7.3 Typical Application
      1. 7.3.1 Two Port, Auto Mode Application with External Port Reset
        1. 7.3.1.1 Design Requirements
      2. 7.3.2 Four Port, Auto Mode Application
        1. 7.3.2.1 Design Requirements
      3. 7.3.3 Eight Port, Semi-Auto Mode Application Using MSP430 Micro-Controller
        1. 7.3.3.1 Design Requirements
      4. 7.3.4 Detailed Design Procedure
        1. 7.3.4.1 Power Pin Bypass Capacitors
        2. 7.3.4.2 Per Port Components
        3. 7.3.4.3 System Level Components (not shown in the schematic diagrams)
      5. 7.3.5 Application Curves
    4. 7.4 System Examples
      1. 7.4.1 Overcurrent and Overload Protection
      2. 7.4.2 Inrush Protection
      3. 7.4.3 ICUT Current Limit
      4. 7.4.4 Foldback Protection (ILIM)
      5. 7.4.5 Kelvin Current Sensing Resistor
    5. 7.5 Power Supply Recommendations
      1. 7.5.1 VDD
      2. 7.5.2 VPWR
      3. 7.5.3 VPWR-RESET Sequencing
    6. 7.6 Layout
      1. 7.6.1 Layout Guidelines
        1. 7.6.1.1 Port Current Kelvin Sensing
      2. 7.6.2 Layout Example
        1. 7.6.2.1 Component Placement and Routing Guidelines
          1. 7.6.2.1.1 Power Pin Bypass Capacitors
          2. 7.6.2.1.2 Per-Port Components
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.7 Switching Characteristics

–40 ≤ TJ ≤ +125°C, VVDD = 3.3V, VVPWR = 48V, VDGND = VAGND, DGND, KSENSA and KSENSB connected to AGND, and all outputs are unloaded, PoEPn = 0, Positive currents are into pins, RS = 0.255Ω, to KSENSA (SEN1 or SEN2) or to KSENSB (SEN3 or SEN4), RSENS = 22Ω, RDRAIN = 47Ω, typical values are at 25°C. All voltages are with respect to AGND, operating registers loaded with default values (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
δIfaultDuty cycle of IPORT with current fault5.5%6.7%
tOVLDICUT time limitTICUT = 00, default as supplied5070ms
TICUT = 012535ms
TICUT = 10100140ms
TICUT = 11200280ms
tLIMILIM time limitPOEPn = 0, default as supplied5070ms
POEPn = 1, TLIM = 005070ms
POEPn = 1, TLIM = 0128.43034ms
POEPn = 1, TLIM = 1014.715.517ms
POEPn = 1, TLIM = 119.02511.5ms
tSTARTMaximum current limit duration in port start-upTSTART = 00, default as supplied5070ms
TSTART = 012535ms
TSTART = 10100140ms
tDETFour-point detection durationTime to complete a detection275500ms
tDET_BOFFPause between detection attemptsVVPWR – VDRAINn > 2.5V300400500ms
VVPWR – VDRAINn < 2.5V0150ms
tCLEClassification duration1st and 2nd class event, Auto Mode, Semi-Auto Mode, from detection complete6.513ms
tpdcClassification duration1-event physical layer class timing, Auto Mode and Semi-Auto Mode, from detection complete6.513ms
Manual mode, from beginning of classification6.514ms
tMEMark duration1st and 2nd mark event, from class 4 complete612ms
tp(on)Port power-on delayManual mode, from port turn-on command to port turn on completed4ms
ted Fault delay timing. Delay before next attempt to power a port following power removal due to fault condition ICUT , ILIM or start fault, Auto Mode, Semi-Auto Mode,
CLDN = 0X, default as supplied		 0.8 1 1.2 s
ICUT , ILIM or start fault, Auto Mode, Semi-Auto Mode,
CLDN = 10		1.622.4s
ICUT , ILIM or start fault, Auto Mode, Semi-Auto Mode,
CLDN = 11		3.244.8s
tMPDOPD maintain power signature dropout time limitTDIS = 00, default as supplied300400ms
TDIS = 0175100ms
TDIS = 10150200ms
TDIS = 11600800ms
tD_off_ SHDWNGate turn-off time from SHTDWN inputFrom SHTDWN to VGATEn < 1V, VSENn = 0V15µs
tP_off_CMDGate turn-off time from port off commandFrom port off command to VGATEn < 1V, VSENn = 0V900µs
tP_off_RSTGate turn-off time with RESET pinFrom RESET low to, VGATEn < 1V, VSENn = 0V15µs
tD_off_SENGate turn-off time from SENn inputPOEPn = 0,
VDRAINn = 1V , from VSENn pulsed to 0.425V		0.9µs
POEPn = 1,
VDRAINn = 1V , from VSENn pulsed to 0.62V		0.9µs
tPORDevice power-on-reset delay23ms
tRESETReset time duration from RESET pin15µs
TPS23861 Overcurrent Fault Timing Figure 5-2 Overcurrent Fault Timing
TPS23861 Detection, 1-Event Classification, and Turn On Figure 5-3 Detection, 1-Event Classification, and Turn On
TPS23861 Detection, 2-Event Classification, and Turn On Figure 5-4 Detection, 2-Event Classification, and Turn On
TPS23861 VDD Power-On-Reset
For more information refer to the application note, TPS23861 Power-On Considerations, SLVA723.
Figure 5-5 VDD Power-On-Reset
TPS23861 VPWR Power-On-Reset
For more information refer to the application note, TPS23861 Power-On Considerations, SLVA723.
Figure 5-6 VPWR Power-On-Reset