SLUSF91 December   2025 UCC23710

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Power Supplies
      2. 6.3.2  VDD Undervoltage Lockout (UVLO)
      3. 6.3.3  Opto-Emulated Input
      4. 6.3.4  Driver Stage
      5. 6.3.5  Active Pulldown
      6. 6.3.6  Short Circuit Clamping
      7. 6.3.7  Internal Active Miller Clamp
      8. 6.3.8  Desaturation (DESAT) Protection
      9. 6.3.9  Soft Turn Off (STO)
      10. 6.3.10 Fault (FLT) and Reset
    4. 6.4 Device Functional Modes
  8. 7 Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Selecting the Input Resistor
        2. 7.2.2.2 Gate Driver Output Resistor
        3. 7.2.2.3 FLT Output
        4. 7.2.2.4 Estimate Gate-Driver Power Loss
        5. 7.2.2.5 Selecting VDD Capacitor
        6. 7.2.2.6 Overcurrent and Short Circuit Protection
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2.2.5 Selecting VDD Capacitor

Bypass capacitors for VDD is essential for achieving reliable performance. TI recommends choosing low-ESR and low-ESL, surface-mount, multi-layer ceramic capacitors (MLCC) with sufficient voltage ratings, temperature coefficients, and capacitance tolerances. A 50V, 10μF MLCC and a 50V, 0.22μF MLCC are selected for the CVDD capacitor. If the bias power supply output is located a relatively long distance from the VCC pin, a tantalum or electrolytic capacitor with a value greater than 10μF should be used in parallel with CVDD.

Note:

DC bias on some MLCCs impacts the actual capacitance value. For example, a 25V, 1μF X7R capacitor is measured to be only 500nF when a DC bias of 15VDC is applied.