SLVAF66 June   2021 DRV3255-Q1 , DRV8300 , DRV8301 , DRV8302 , DRV8303 , DRV8304 , DRV8305 , DRV8305-Q1 , DRV8306 , DRV8307 , DRV8308 , DRV8320 , DRV8320R , DRV8323 , DRV8323R , DRV8340-Q1 , DRV8343-Q1 , DRV8350 , DRV8350F , DRV8350R , DRV8353 , DRV8353F , DRV8353R

 

  1. 1 Introduction to High-Power Motor Applications
    1. 1.1 Effects of a Poorly-Designed High-Power Motor Driver System
    2. 1.2 Example of the High-Power Design Process
  2. 2 Examining a High-Power Motor Drive System at a High Level
    1. 2.1 Anatomy of the Motor Drive Power Stage and How to Troubleshoot
    2. 2.2 Troubleshooting a High-Power System
  3. 3 High-Power Design Through MOSFETs and MOSFET Gate Current (IDRIVE)
    1. 3.1 MOSFET Gate Current
      1. 3.1.1 How Gate Current Causes Damage
      2. 3.1.2 Gate Resistors and Smart Gate Drive Technology
        1. 3.1.2.1 Gate Resistors
        2. 3.1.2.2 Smart Gate Drive and Internally-Controlled Sink and Source Gate Currents
        3. 3.1.2.3 Summary for Gate Resistors and Smart Gate Drive Technology
      3. 3.1.3 Example Gate Current Calculation for a Given FET
  4. 4 High-Power Design Through External Components
    1. 4.1 Bulk and Decoupling Capacitors
      1. 4.1.1 Note on Capacitor Voltage Ratings
    2. 4.2 RC Snubber Circuits
    3. 4.3 High-Side Drain to Low-Side Source Capacitor
    4. 4.4 Gate-to-GND Diodes
  5. 5 High-Power Design Through a Parallel MOSFET Power Stage
  6. 6 High-Power Design Through Protection
    1. 6.1 VDS and VGS Monitoring
      1. 6.1.1 Turning Off the FETs During an Overcurrent, Shoot-Through, or FET Shorting Event
    2. 6.2 Passive Gate-to-Source Pulldown Resistors
    3. 6.3 Power Supply Reverse Polarity or Power Supply Cutoff Protection
  7. 7 High-Power Design Through Motor Control Methods
    1. 7.1 Brake versus Coast
      1. 7.1.1 Algorithm-Based Solutions
      2. 7.1.2 External Circuit Solutions
      3. 7.1.3 Summary of Brake versus Coast
  8. 8 High-Power Design Through Layout
    1. 8.1 What is a Kelvin Connection?
    2. 8.2 General Layout Advice
  9. 9 Conclusion
  10. 10Acknowledgments

6.1.1 Turning Off the FETs During an Overcurrent, Shoot-Through, or FET Shorting Event

If the VDS monitors or other current protection recognizes an overcurrent event, the obvious solution is to turn off the FETs so they stop current from passing through. In this scenario, the phase current could be more than 10 or 100 times higher than the typical use case. As already explored in Section 2, more current in the phase results in higher parasitic inductive spiking, but increasing the FETs rise or fall time by decreasing the gate drive current decreases the inductive spiking.

In a typical gate-driver case, Section 3.1.2.2 established the sink current is fixed by the external gate resistors and cannot be changed during the overcurrent event. However, TI’s Smart Gate Drive technology automatically lowers the gate drive current so that the FET has a longer fall time than the typical value, which reduces the overall voltage spiking that occurs from an overcurrent event.