Product details

Rating Catalog Control method Trapezoidal Control Architecture Gate Driver Control interface 1xPWM Gate drive (A) 0.15 Vs (Min) (V) 6 Vs ABS (Max) (V) 40 Features Hardware Management I/F, Hall Element Comparators, Integrated Motor Control, Smart Gate Drive, Tach/FG Feedback Operating temperature range (C) -40 to 125
Rating Catalog Control method Trapezoidal Control Architecture Gate Driver Control interface 1xPWM Gate drive (A) 0.15 Vs (Min) (V) 6 Vs ABS (Max) (V) 40 Features Hardware Management I/F, Hall Element Comparators, Integrated Motor Control, Smart Gate Drive, Tach/FG Feedback Operating temperature range (C) -40 to 125
VQFN (RSM) 32 16 mm² 4 x 4
  • 6-V to 38-V, Triple Half-Bridge Gate Driver With Integrated 3x Hall Comparators
    • 40-V Absolute Maximum Rating
    • Fully Optimized for 12-V and 24-V DC Rails
    • Drives High-Side and Low-Side N-Channel MOSFETs
    • Supports 100% PWM Duty Cycle
  • Smart Gate Drive Architecture
    • Adjustable Slew-Rate Control for Better EMI and EMC Performance
    • VGS Hand-Shake and Minimum Dead-Time Insertion to Avoid Shoot-Through
    • 15-mA to 150-mA Peak Source Current
    • 30-mA to 300-mA Peak Sink Current
  • Integrated Commutation from Hall Sensors
    • 120° Trapezoidal Current Control
    • Supports Low-Cost Hall Elements
    • Tacho Output Signal (FGOUT) for Closed Loop Speed Control
  • Integrated Gate Driver Power Supplies
    • High-Side Charge Pump
    • Low-Side Linear Regulator
  • Cycle-by-Cycle Current Limit
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Low-Power Sleep Mode
  • Linear Voltage Regulator, 3.3 V, 30 mA
  • Compact VQFN Package and Footprint
  • Integrated Protection Features
    • VM Undervoltage Lockout (UVLO)
    • Charge Pump Undervoltage (CPUV)
    • MOSFET Overcurrent Protection (OCP)
    • Gate Driver Fault (GDF)
    • Thermal Shutdown (OTSD)
    • Fault Condition Indicator (nFAULT)
  • 6-V to 38-V, Triple Half-Bridge Gate Driver With Integrated 3x Hall Comparators
    • 40-V Absolute Maximum Rating
    • Fully Optimized for 12-V and 24-V DC Rails
    • Drives High-Side and Low-Side N-Channel MOSFETs
    • Supports 100% PWM Duty Cycle
  • Smart Gate Drive Architecture
    • Adjustable Slew-Rate Control for Better EMI and EMC Performance
    • VGS Hand-Shake and Minimum Dead-Time Insertion to Avoid Shoot-Through
    • 15-mA to 150-mA Peak Source Current
    • 30-mA to 300-mA Peak Sink Current
  • Integrated Commutation from Hall Sensors
    • 120° Trapezoidal Current Control
    • Supports Low-Cost Hall Elements
    • Tacho Output Signal (FGOUT) for Closed Loop Speed Control
  • Integrated Gate Driver Power Supplies
    • High-Side Charge Pump
    • Low-Side Linear Regulator
  • Cycle-by-Cycle Current Limit
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Low-Power Sleep Mode
  • Linear Voltage Regulator, 3.3 V, 30 mA
  • Compact VQFN Package and Footprint
  • Integrated Protection Features
    • VM Undervoltage Lockout (UVLO)
    • Charge Pump Undervoltage (CPUV)
    • MOSFET Overcurrent Protection (OCP)
    • Gate Driver Fault (GDF)
    • Thermal Shutdown (OTSD)
    • Fault Condition Indicator (nFAULT)

The DRV8306 device is an integrated gate driver for 3-phase brushless DC (BLDC) motor applications. The device provides three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The DRV8306 device generates the proper gate drive voltages using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The smart gate drive architecture supports up to 150-mA source and 300-mA sink peak gate drive current and 15-mA rms gate drive current capability.

The device provides an internal 120° commutation for the trapezoidal BLDC motor. The DRV8306 device has three Hall comparators which use the input from the Hall elements for internal commutation. The duty cycle ratio of the phase voltage of the motor can be adjusted through the PWM pin. Additional brake (nBRAKE) and direction (DIR) pins are provided for braking and setting the direction of the BLDC motor. A 3.3-V, 30-mA low-dropout (LDO) regulator is provided to supply the external controller and Hall elements. An additional FGOUT signal is provided which is a measure of the commutation frequency. This signal can be used for implementing the closed-loop control of BLDC motor.

A low-power sleep mode is provided to achieve low quiescent current draw by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin.

The DRV8306 device is an integrated gate driver for 3-phase brushless DC (BLDC) motor applications. The device provides three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The DRV8306 device generates the proper gate drive voltages using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The smart gate drive architecture supports up to 150-mA source and 300-mA sink peak gate drive current and 15-mA rms gate drive current capability.

The device provides an internal 120° commutation for the trapezoidal BLDC motor. The DRV8306 device has three Hall comparators which use the input from the Hall elements for internal commutation. The duty cycle ratio of the phase voltage of the motor can be adjusted through the PWM pin. Additional brake (nBRAKE) and direction (DIR) pins are provided for braking and setting the direction of the BLDC motor. A 3.3-V, 30-mA low-dropout (LDO) regulator is provided to supply the external controller and Hall elements. An additional FGOUT signal is provided which is a measure of the commutation frequency. This signal can be used for implementing the closed-loop control of BLDC motor.

A low-power sleep mode is provided to achieve low quiescent current draw by shutting down most of the internal circuitry. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin.

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Technical documentation

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Type Title Date
* Data sheet DRV8306 38-V Brushless DC Motor Controller datasheet (Rev. A) 09 Jul 2018
Technical article Understanding brushless-DC motor systems, part 2 20 Oct 2021
Technical article Understanding brushless-DC motor systems, part 1 18 Oct 2021
Application note Best Practices for Board Layout of Motor Drivers (Rev. B) 14 Oct 2021
Application note System Design Considerations for High-Power Motor Driver Applications 22 Jun 2021
Application note Brushless-DC Made Simple – Sensored Motor Control (Rev. B) 13 Apr 2021
Technical article A basic brushless gate driver design – part 3: integrated vs. discrete half bridges 16 Dec 2020
Application note Low Voltage Motor Drive Operation With Smart Gate Drive 20 Dec 2018
Application note Cut-Off Switch in High-Current Motor-Drive Applications (Rev. A) 20 Aug 2018
Technical article Connectivity helps integrate intelligent motor control on a single MCU 06 Jun 2018
User guide DRV8306EVM User’s Guide 03 Apr 2018

Design & development

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Evaluation board

DRV8306EVM — DRV8306 Three-Phase Motor Smart Gate Driver Evaluation Module

The DRV8306 evaluation module (EVM) is an application board designed to allow easy evaluation of the DRV8306 device. The DRV8306 device is a gate driver IC for three-phase motor drive applications. The DRV8306 device provides three high-accuracy trimmed and temperature-compensated half bridge (...)
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DRV8306EVM Design Files

SLVC718.ZIP (5641 KB)
Package Pins Download
VQFN (RSM) 32 View options

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