Product details

Rating Automotive Control method External Control, Trapezoidal Control Architecture Gate Driver Control interface 6xPWM, 3xPWM, 1xPWM Gate drive (A) 1 Vs (Min) (V) 5.5 Vs ABS (Max) (V) 65 Features Independent FET Control, Current Sense Amplifier, Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (C) -40 to 125
Rating Automotive Control method External Control, Trapezoidal Control Architecture Gate Driver Control interface 6xPWM, 3xPWM, 1xPWM Gate drive (A) 1 Vs (Min) (V) 5.5 Vs ABS (Max) (V) 65 Features Independent FET Control, Current Sense Amplifier, Hardware Management I/F, SPI/I2C, Smart Gate Drive Operating temperature range (C) -40 to 125
HTQFP (PHP) 48 49 mm² 7 x 7
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1: –40°C ≤ TA ≤ 125°C
  • Three independent half-bridge gate driver
    • Dedicated source (SHx) and drain (DLx) pins to support independent MOSFET control
    • Drives 3 high-side and 3 low-side N-channel MOSFETs (NMOS)
  • Smart gate drive architecture
    • Adjustable slew rate control
    • 1.5-mA to 1-A peak source current
    • 3-mA to 2-A peak sink current
  • Charge-pump of gate driver for 100% Duty Cycle
  • 3 Integrated current sense amplifiers (CSAs)
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • SPI (S) and hardware (H) interface available
  • 6x, 3x, 1x, and independent PWM modes
  • Supports 3.3-V, and 5-V logic inputs
  • Charge pump output can be used to drive the reverse supply protection MOSFET
  • Linear voltage regulator, 3.3 V, 30 mA
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Charge pump undervoltage (CPUV)
    • Short to battery (SHT_BAT)
    • Short to ground (SHT_GND)
    • MOSFET overcurrent protection (OCP)
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1: –40°C ≤ TA ≤ 125°C
  • Three independent half-bridge gate driver
    • Dedicated source (SHx) and drain (DLx) pins to support independent MOSFET control
    • Drives 3 high-side and 3 low-side N-channel MOSFETs (NMOS)
  • Smart gate drive architecture
    • Adjustable slew rate control
    • 1.5-mA to 1-A peak source current
    • 3-mA to 2-A peak sink current
  • Charge-pump of gate driver for 100% Duty Cycle
  • 3 Integrated current sense amplifiers (CSAs)
    • Adjustable gain (5, 10, 20, 40 V/V)
    • Bidirectional or unidirectional support
  • SPI (S) and hardware (H) interface available
  • 6x, 3x, 1x, and independent PWM modes
  • Supports 3.3-V, and 5-V logic inputs
  • Charge pump output can be used to drive the reverse supply protection MOSFET
  • Linear voltage regulator, 3.3 V, 30 mA
  • Integrated protection features
    • VM undervoltage lockout (UVLO)
    • Charge pump undervoltage (CPUV)
    • Short to battery (SHT_BAT)
    • Short to ground (SHT_GND)
    • MOSFET overcurrent protection (OCP)
    • Gate driver fault (GDF)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indicator (nFAULT)

The DRV8343-Q1 device is an integrated gate driver for three-phase applications. The device provides three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The dedicated Source and Drain pins enable the independent MOSFET control for solenoid application. The DRV8343-Q1 generates the correct gate drive voltages using an integrated charge pump sufficient for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The Smart Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A. The DRV8343-Q1 can operate from a single power supply and supports a wide input supply range of 5.5 to 60 V for the gate driver.

The 6x, 3x, 1x, and independent input PWM modes allow for simple interfacing to controller circuits. The configuration settings for the gate driver and device are highly configurable through the SPI or hardware (H/W) interface. The DRV8343-Q1 device integrates three low-side current sense amplifiers that allow bidirectional current sensing on all three phases of the drive stage.

A low-power sleep mode is provided to achieve low quiescent current. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, phase-node short to supply and ground, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin with details through the device registers for the SPI device variant.

The DRV8343-Q1 device is an integrated gate driver for three-phase applications. The device provides three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The dedicated Source and Drain pins enable the independent MOSFET control for solenoid application. The DRV8343-Q1 generates the correct gate drive voltages using an integrated charge pump sufficient for the high-side MOSFETs and a linear regulator for the low-side MOSFETs. The Smart Gate Drive architecture supports peak gate drive currents up to 1-A source and 2-A. The DRV8343-Q1 can operate from a single power supply and supports a wide input supply range of 5.5 to 60 V for the gate driver.

The 6x, 3x, 1x, and independent input PWM modes allow for simple interfacing to controller circuits. The configuration settings for the gate driver and device are highly configurable through the SPI or hardware (H/W) interface. The DRV8343-Q1 device integrates three low-side current sense amplifiers that allow bidirectional current sensing on all three phases of the drive stage.

A low-power sleep mode is provided to achieve low quiescent current. Internal protection functions are provided for undervoltage lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, phase-node short to supply and ground, gate driver fault, and overtemperature. Fault conditions are indicated on the nFAULT pin with details through the device registers for the SPI device variant.

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Technical documentation

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Type Title Date
* Data sheet DRV8343-Q1 12-V / 24-V Automotive Gate Driver Unit (GDU) with Independent Half Bridge Control and Three Integrated Current Sense Amplifiers datasheet (Rev. A) 09 Apr 2019
Technical article Understanding brushless-DC motor systems, part 2 20 Oct 2021
Technical article Understanding brushless-DC motor systems, part 1 18 Oct 2021
Application note Best Practices for Board Layout of Motor Drivers (Rev. B) 14 Oct 2021
Application note Hardware Design Considerations for an Electric Bicycle using BLDC Motor (Rev. B) 23 Jun 2021
Application note System Design Considerations for High-Power Motor Driver Applications 22 Jun 2021
Technical article A basic brushless gate driver design – part 3: integrated vs. discrete half bridges 16 Dec 2020
Technical article How analog integration simplifies automotive body motor controller designs 23 Oct 2020
Application note Switched Reluctance Motor (SRM) Inverter Design With the DRV8343-Q1 30 Jan 2020
User guide DRV8343H-Q1EVM and DRV8343S-Q1EVM User's Guide (Rev. B) 18 Apr 2019
Application note Protecting Automotive Motor Drive Systems from Reverse Polarity Conditions (Rev. A) 19 Feb 2019
Application note Using DRV to Drive Solenoids - DRV8876/DRV8702-Q1/DRV8343-Q1 19 Feb 2018
User guide DRV8343x-Q1EVM GUI User's Guide 29 Jan 2018
User guide DRV8343x-Q1EVM Independent Mode User's Guide 29 Jan 2018
User guide DRV8343x-Q1EVM Sensored Software User's Guide 29 Jan 2018
User guide DRV8343x-Q1EVM Sensorless Software User's Guide 29 Jan 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DRV8343H-Q1EVM — DRV8343H-Q1 Automotive Three-Phase Motor Smart Gate Driver Evaluation Module

The DRV8343H-Q1EVM evaluation module is a 6V to 60V, 20A, a highly configurable 3-phase brushless DC (BLDC) motor drive and control evaluation platform designed for 12-V to 24-V automotive systems based on the DRV8343H-Q1 automotive smart gate driver.  The EVM has onboard reverse battery (...)
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Limit: 5
Evaluation board

DRV8343S-Q1EVM — DRV8343S-Q1 Automotive Three-Phase Motor Smart Gate Driver Evaluation Module

The DRV8343S-Q1EVM evaluation module is a 6V to 60V, 20A, a highly configurable 3-phase brushless DC (BLDC) motor drive and control evaluation platform designed for 12-V to 24-V automotive systems based on the DRV8343S-Q1 automotive smart gate driver.  The EVM has onboard reverse battery (...)
In stock
Limit: 1
Simulation model

DRV834XQ1 PSPICE Model

SLVMD44.ZIP (246 KB) - PSpice Model
Reference designs

TIDA-060030 — Automotive 12-V to 24-V engine load interface reference design

This reference design is a 3-phase 1/2 H-Bridge Motor Drive solution with independent FET capability that interfaces with solenoid loads found in Gasoline and Diesel Engine Platforms such as automotive solenoids, bidirectional Brushed- or Brushless-DC motors, unidirectional Brushed-DC motors, and (...)
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HTQFP (PHP) 48 View options

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