The TPS2HCS10-Q1 provides an integrated successive approximation 10-bit ADC which can convert different analog signals to digital signals which can be read out through SPI. The ADC can convert the following analog signals:

• CH1 and CH2 current sense (ISNS1/2)
• CH1 and CH2 MOSFET temperature sense (TSNS1/2)
• VBB voltage sense (VBB_SNS)
• CH1 and CH2 VOUT voltage sense (VSNS1/2)
• CH1 and CH2 MOSFET drain-to-source voltage (VDS) sense (VDS_SNS1/2)

Figure 8-18 provides a functional block diagram of the integrated ADC along with the analog signal inputs to the ADC.

Conversion of any of the analog signals can either be disabled globally through the ADC_CONFIG register or on a per channel basis through CHx_CONFIG registers with the exception of temperature sensing. The temperature sensing can not be disabled on a per channel basis and can only be disabled globally through the ADC_TSNS_DIS bit.

To help reduce the quiescent current, the device only enables the current sense circuitry when the ADC is converting either of the ISNSx signals and disables it during all other signal conversions. The device also provides a configurable delay which can also help to further reduce the quiescent current of the device by reducing the sampling rate of the ADC. The configurable delay is set by the ADC_ISNS_SAMPLE_CONFIG [1:0] bits in the ADC_CONFIG register.

If I2T protection is enabled (I2T_EN_CHx = 1) and either channel is not in I2T mode (I2T_MOD_CHx = 0), then the device will convert each of the analog signals in a round robin sequence with the configurable delay. Figure 8-16 below shows the ADC scheduling if no channel is in I2T mode (I2T_MOD_CHx = 0) and all analog signal conversions are enabled. If I2T protection is disabled then the round robin sequence below also applies.

If I2T protection is enabled (I2T_EN_CHx = 1) and one or both of the channels are in I2T mode (I2T_MOD_CHx = 1), then the device disables all conversions except for the ISNSx conversions which are used for the internal I2T protection. The device also disables the configurable delay function as well. Figure 8-17 below shows the ADC scheduling if one or both of the channels are in I2T mode (I2T_MOD_CHx = 1).

The reference voltage for the ADC is fixed internally and is specified in the electrical characteristics table through the V_ADCREFHI parameter. The ADC's ground reference is connected internally to the GND of the device. For accurate current sense results, the ground connection of the R_SNS resistor should be connected to the GND pin of the device. The conversion equation for each of the analog signals can be found in their respective sections below.