The LIMP_HOME state is intended to place the outputs in the desired safe state when there is a failure of SPI communication (if WD_EN=1), loss of VDD supply (if WD_EN = 1), or another system-level fault which causes the LHI pin to go high. When the ECU detects a system-level fault, the system controller raises the LHI pin high to signal to the device to go to the LIMP_HOME state. If the device detects a SPI watch dog timeout error and thus a SPI communication error, the device goes to the LIMP HOME state. In both cases, the output state is as specified on a per channel basis through the CHx_LH_IN bits of the DEV_CONFIG register. The settings for the CHx_LH_IN bits are detailed in Table 8-9.

The register values are retained in the LIMP HOME state, which means that the appropriate overcurrent protection threshold values, duration and retry behavior are all set with the outputs corresponding to the state based on the CHx_LH_IN bits. If the device entered into the LIMP_HOME state as a result of the LHI pin going high, the LIMPHOME_STAT bit in the GLOBAL_FAULT_TYPE register is set to 1 which lets the MCU or controller know that the device is in the LIMP HOME state. The MCU cannot write to any of the registers until the device is out of the LIMP HOME state.

If the device entered the LIMP_HOME state as a result of LHI going high, the device transitions out of the LIMP_HOME state when the LHI pin is brought low and a is written to the LIMPHOME_STAT bit in the GLOBAL_FAULT_TYPE register. The register settings are reatined while in LIMP HOME state and the device transitions back into normal operation in the ACTIVE state.

If the device entered LIMP_HOME state as a result of a SPI watchdog timeout error, the outputs will be set according to the CHx_LH_IN bits but the LIMPHOME_STAT bit will not be set to 1. The device will automatically exit the LIMP_HOME state if a valid SPI transaction is detected. The WD_ERR bit in the GLOBAL_FAULT_TYPE register will be latched to 1 as a result of a SPI watchdog timeout error and can be cleared only after read and the error no longer exists.

If VDD < VDD_UVLO, the device can still transition to LIMP_HOME state through the LHI input if LHI = 1.

LIMP HOME State Exceptions

The device can receive an LHI signal during cap charging or inrush duration. If the desired state is ON, the device continues cap charging per programmed register values. If the desired state is OFF, then the channel is turned off.

In LIMP_HOME state, if a short circuit occurs that causes an overcurrent fault (ILIMIT_CHx) or a thermal shutdown fault (THERMAL_SD_CHx), the output channels will continue to retry regardless of the LATCH_CHx bit setting if the channel(s) are configured to be ON by the CHx_LH_IN bits. If LATCH_CHx = 1 and the output channel(s) are latched off due to an overcurrent fault or thermal shutdown fault and the device enters LIMP_HOME state either through LHI = 1 or a watchdog fault (if WD_EN = 1), the channel(s) will be re-enabled and will continue to retry if a persistent short exists regardless of the LATCH_CHx setting if the channel(s) are configured to be ON through the CHx_LH_IN bits.

In LIMP_HOME state, if an I2T fault (I2T_FLT_CHx) should occur on the channel(s) and TCLDN_CHx = 00 (indefinite cooldown), the channel(s) will remain in indefinite cooldown and will not retry even if the channel(s) are configured to be ON through the CHx_LH_IN bits. If an I2T fault occurs in active state and TCLDN_CHx = 00 (indefinite cooldown) and the device enters LIMP_HOME state either through LHI = 1 or a watchdog fault (if WD_EN = 1), the channel(s) will remain in indefinite cooldown and will not retry even if the channel(s) are configured to be ON through the CHx_LH_IN bits.