SLVSGY2A October   2023  – October 2025 TPS2HCS10-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1. 5.1 Version A Package
    2. 5.2 Pinout - Version A
    3. 5.3 Version B Package
    4. 5.4 Pinout - Version B
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Protection Mechanisms
        1. 8.3.1.1 Overcurrent Protection
          1. 8.3.1.1.1 Inrush Period - Overcurrent Protection
          2. 8.3.1.1.2 Overcurrent Protection - Steady State Operation
          3. 8.3.1.1.3 Programmable Fuse Protection
          4. 8.3.1.1.4 Immediate Shutdown Overcurrent Protection (IOCP)
          5. 8.3.1.1.5 Auto Retry and Latch-Off Behavior
        2. 8.3.1.2 Thermal Shutdown
        3. 8.3.1.3 Reverse Battery
      2. 8.3.2 Diagnostic Mechanisms
        1. 8.3.2.1 Integrated ADC
        2. 8.3.2.2 Digital Current Sense Output
        3. 8.3.2.3 Output Voltage Measurement
        4. 8.3.2.4 MOSFET Temperature Measurement
        5. 8.3.2.5 Drain-to-Source Voltage (VDS) Measurement
        6. 8.3.2.6 VBB Voltage Measurement
        7. 8.3.2.7 VOUT Short-to-Battery and Open-Load
          1. 8.3.2.7.1 Measurement with Channel Output (FET) Enabled
          2. 8.3.2.7.2 Detection with Channel Output Disabled
      3. 8.3.3 Parallel Mode Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 Output Control
      3. 8.4.3 SPI Mode Operation
      4. 8.4.4 Fault Reporting
      5. 8.4.5 SLEEP
      6. 8.4.6 CONFIG/ACTIVE
      7. 8.4.7 LIMP_HOME State (Version A only)
      8. 8.4.8 Battery Supply Input (VBB) Under-Voltage
      9. 8.4.9 LOW POWER MODE (LPM) States
        1. 8.4.9.1 MANUAL_LPM State
        2. 8.4.9.2 AUTO_LPM State
    5. 8.5 TPS2HCS10-Q1 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Thermal Considerations
        2. 9.2.2.2 Configuring the Capacitive Charging Mode
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.8 Typical Characteristics

TPS2HCS10-Q1 On Resistance (RON) vs Temperature
IOUT = 500mA Active state
OL_ON_EN_CHx = 0
Figure 6-1 On Resistance (RON) vs Temperature
TPS2HCS10-Q1 On Resistance in AUTO_LPM (RON,LPM_AUTO) vs Temperature
IOUT = 500mA AUTO_LPM state
Figure 6-3 On Resistance in AUTO_LPM (RON,LPM_AUTO) vs Temperature
TPS2HCS10-Q1 VBB Sleep Current (ISLEEP,VBB) vs Temperature
VDD = 5.5V SLEEP state
Figure 6-5 VBB Sleep Current (ISLEEP,VBB) vs Temperature
TPS2HCS10-Q1 VBB IQ Current in MANUAL_LPM (IQ,VBB,LPM_MAN) - Channels Off vs Temperature
MANUAL_LPM state VDD = 5V
Channels off
Figure 6-7 VBB IQ Current in MANUAL_LPM (IQ,VBB,LPM_MAN) - Channels Off vs Temperature
TPS2HCS10-Q1 VBB IQ Current in MANUAL_LPM (IQ,VBB,LPM_MAN) - One Channel Enabled vs Temperature
MANUAL_LPM state VDD = 5V
One channel enabled IOUT = 0A
Figure 6-9 VBB IQ Current in MANUAL_LPM (IQ,VBB,LPM_MAN) - One Channel Enabled vs Temperature
TPS2HCS10-Q1 VBB IQ Current in MANUAL_LPM (IQ,VBB,LPM_MAN) - Both Channels Enabled vs Temperature
MANUAL_LPM state VDD = 5V
Both channels enabled IOUT = 0A
Figure 6-11 VBB IQ Current in MANUAL_LPM (IQ,VBB,LPM_MAN) - Both Channels Enabled vs Temperature
TPS2HCS10-Q1 KSNS1 % Error vs Temperature
KSNS1 reference = 5000
OL_ON_EN_CHx = 0 IOUT = 2A
Figure 6-13 KSNS1 % Error vs Temperature
TPS2HCS10-Q1 On Resistance, OL_ON Mode (RON_OL) vs Temperature
IOUT = 500mA Active state
OL_ON_EN_CHx = 1
Figure 6-2 On Resistance, OL_ON Mode (RON_OL) vs Temperature
TPS2HCS10-Q1 On Resistance in MANUAL_LPM (RON,LPM_MAN) vs Temperature
Figure 6-4 On Resistance in MANUAL_LPM (RON,LPM_MAN) vs Temperature
TPS2HCS10-Q1 VBB IQ Current (IQ,VBB) vs Temperature
ACTIVE state Diagnostics enabled (ISNS, ADC)
IOUT = 0A SCLK off
Figure 6-6 VBB IQ Current (IQ,VBB) vs Temperature
TPS2HCS10-Q1 VDD IQ Current in MANUAL_LPM (IQ,VDD,LPM_MAN) - Channels Off vs Temperature
MANUAL_LPM state VDD = 5V
Channels off IOUT = 0A
Figure 6-8 VDD IQ Current in MANUAL_LPM (IQ,VDD,LPM_MAN) - Channels Off vs Temperature
TPS2HCS10-Q1 VDD IQ Current in MANUAL_LPM (IQ,VDD,LPM_MAN) - One Channel Enabled vs Temperature
MANUAL_LPM state VDD = 5V
One channel enabled IOUT = 0A
Figure 6-10 VDD IQ Current in MANUAL_LPM (IQ,VDD,LPM_MAN) - One Channel Enabled vs Temperature
TPS2HCS10-Q1 VDD IQ Current in MANUAL_LPM (IQ,VDD,LPM_MAN) - Both Channels Enabled vs Temperature
MANUAL_LPM state VDD = 5V
Both channels enabled IOUT = 0A
Figure 6-12 VDD IQ Current in MANUAL_LPM (IQ,VDD,LPM_MAN) - Both Channels Enabled vs Temperature
TPS2HCS10-Q1 KSNS2 % Error vs Temperature
KSNS2 reference = 1400
OL_ON_EN_CHx = 1 IOUT = 25mA
Figure 6-14 KSNS2 % Error vs Temperature