SLVSGY2A October   2023  – October 2025 TPS2HCS10-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1. 5.1 Version A Package
    2. 5.2 Pinout - Version A
    3. 5.3 Version B Package
    4. 5.4 Pinout - Version B
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Protection Mechanisms
        1. 8.3.1.1 Overcurrent Protection
          1. 8.3.1.1.1 Inrush Period - Overcurrent Protection
          2. 8.3.1.1.2 Overcurrent Protection - Steady State Operation
          3. 8.3.1.1.3 Programmable Fuse Protection
          4. 8.3.1.1.4 Immediate Shutdown Overcurrent Protection (IOCP)
          5. 8.3.1.1.5 Auto Retry and Latch-Off Behavior
        2. 8.3.1.2 Thermal Shutdown
        3. 8.3.1.3 Reverse Battery
      2. 8.3.2 Diagnostic Mechanisms
        1. 8.3.2.1 Integrated ADC
        2. 8.3.2.2 Digital Current Sense Output
        3. 8.3.2.3 Output Voltage Measurement
        4. 8.3.2.4 MOSFET Temperature Measurement
        5. 8.3.2.5 Drain-to-Source Voltage (VDS) Measurement
        6. 8.3.2.6 VBB Voltage Measurement
        7. 8.3.2.7 VOUT Short-to-Battery and Open-Load
          1. 8.3.2.7.1 Measurement with Channel Output (FET) Enabled
          2. 8.3.2.7.2 Detection with Channel Output Disabled
      3. 8.3.3 Parallel Mode Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 Output Control
      3. 8.4.3 SPI Mode Operation
      4. 8.4.4 Fault Reporting
      5. 8.4.5 SLEEP
      6. 8.4.6 CONFIG/ACTIVE
      7. 8.4.7 LIMP_HOME State (Version A only)
      8. 8.4.8 Battery Supply Input (VBB) Under-Voltage
      9. 8.4.9 LOW POWER MODE (LPM) States
        1. 8.4.9.1 MANUAL_LPM State
        2. 8.4.9.2 AUTO_LPM State
    5. 8.5 TPS2HCS10-Q1 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Thermal Considerations
        2. 9.2.2.2 Configuring the Capacitive Charging Mode
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

9.1 Application Information

Figure 9-1 and Figure 9-2 shows the schematic of a typical application of the TPS2HCS10A-Q1 and TPS2HCS10B-Q1, respectively. It includes all standard external components. This section of the data sheet discusses the considerations in implementing commonly required application functionality. The circuit assumes no reverse polarity protection on the input supply, so additional components for protection are required.

TPS2HCS10-Q1 System Diagram - TPS2HCS10A-Q1 Figure 9-1 System Diagram - TPS2HCS10A-Q1
TPS2HCS10-Q1 System Diagram - TPS2HCS10B-Q1 Figure 9-2 System Diagram - TPS2HCS10B-Q1
With the ground protection network, the device ground will be offset relative to the micro-controller ground. The same power supply (5V (recommended) or 3.3V) source should be used for the controller (MCU) I/O as well as the VDD supply input to the TPS2HCS10B-Q1 device.
Table 9-1 Recommended External Components
Component Typical Value Purpose
RSPI 22Ω (Optional) For EMI or other transient limits on the SPI pins.
RSDO 768Ω Higher values to increase the total resistance to MCU VDD to 768Ω for ground loss detection
RPROT 10kΩ Protect micro-controller and device GPIO pins
RPU 4.7kΩ Pull-up resistor
RSNS 0.2-1.5kΩ Translate the sense current into sense voltage for internal ADC input
CSNS 1 - 4.7nF Low-pass filter for the ADC input.
D1 +/-36V To suppress voltage transients (one for the module)
DGND BAS21 / Schottky Diode To limit the voltage drop across RGND during normal operation of the device. A low forward voltage diode is recommended and a schottky diode is suggested when the VDD is 3.3V. (Note: Recommended VDD operation is 5V for lower Iq)
RGND 4.7kΩ Maintain ground potential during negative output voltage excursions
RVDD 10Ω Limit the rate of rise / fall in VDD supply input- to the IC.
CVDD 470nF VDD supply voltage stability to system ground.
CVBB1 1 – 4.7nF to IC_GND (Optional) For improved emissions.
CVBB2 100 – 2200nF to Module GND Stabilize the input supply and filter out low frequency noise.
COUTx 22nF - 100nF Filtering of voltage transients (for example, ESD, ISO7637-2).

If MANUAL_LPM, CAP_CHRG_CHx = 10, and/or OL_ON_EN = 1 modes are used and a flyback diode is not used at the output, 100nF is the recommended capacitor value for short-circuit protection in MANUAL_LPM, CAP_CHRG_CHx = 10, and OL_ON_EN = 1 modes. If a flyback diode is used at the output, 22nF is the recommended capacitor value.