SLVSHS0A March   2025  – October 2025 TPS482H85-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics_24V
    8. 6.8 Switching Characteristics_48V
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Current and Voltage Conventions
      2. 7.3.2 Accurate Current Sense
      3. 7.3.3 Adjustable Current Limit
      4. 7.3.4 Inductive-Load Switching-Off Clamp
      5. 7.3.5 Fault Detection and Reporting
        1. 7.3.5.1 Diagnostic Enable Function
        2. 7.3.5.2 Multiplexing of Current Sense
        3. 7.3.5.3 FLT Reporting
        4. 7.3.5.4 Fault Table
      6. 7.3.6 Full Diagnostics
        1. 7.3.6.1 Short-to-GND and Overload Detection
        2. 7.3.6.2 Open-Load Detection
          1. 7.3.6.2.1 Channel On
          2. 7.3.6.2.2 Channel Off
        3. 7.3.6.3 Short-to-Battery Detection
        4. 7.3.6.4 Reverse-Polarity and Battery Protection
        5. 7.3.6.5 Thermal Fault Detection
          1. 7.3.6.5.1 Thermal Protection Behavior
      7. 7.3.7 Full Protections
        1. 7.3.7.1 UVLO Protection
        2. 7.3.7.2 Loss of GND Protection
        3. 7.3.7.3 Loss of Power Supply Protection
        4. 7.3.7.4 Loss of VDD
        5. 7.3.7.5 Reverse Current Protection
        6. 7.3.7.6 Protection for MCU I/Os
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operational Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
        1. 8.4.2.1 Without a GND Network
        2. 8.4.2.2 With a GND Network
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

TPS482H85-Q1 CHU Package 12-PinVQFN-HR Top View Figure 5-1 CHU Package 12-PinVQFN-HR Top View
Table 5-1 Pin Functions See Applications Section for full list of recommended components
PIN TYPE DESCRIPTION
NO. NAME (Ver. A/C) NAME (Ver. B)
1 VOUT1 VOUT1 O Channel 1 output.
2 VOUT2 VOUT2 O Channel 2 output.
3 VBB VBB POWER Input power supply.
4 LATCH FLT I for LATCH, O for FLT
  • LATCH: High to latch OFF device after thermal shutdown; low to auto-retry. Internally pulled down.
  • FLT: Open drain global fault pin.
5 VDD VDD POWER Low voltage supply input. Float to enable the internal regulator.
6 SEL SEL I Selects the channel for fault and current sense output on the SNS pin. Low to select channel 1; high to select channel 2. Internally pulled down.
7 EN2 EN2 I Enable signal for channel 2. Internally pulled down.
8 DIAG_EN DIAG_EN I High to enable ON state current sense and fault reporting through SNS pin, and OFF-state open load detection. Low to disable the diagnostics. Internally pulled down.
9 EN1 EN1 I Enable signal for channel 1. Internally pulled down.
10 SNS SNS O Outputs value based on sense ratio; also shows fault status by going high.
11 GND GND GND Ground of device. Connect to resistor and diode ground network for reverse battery protection.
12 ILIM ILIM O Adjustable current limit. Select the current limit by connecting a resistor from ILIM to IC GND. Leave the pin floating or short the pin to IC GND for two additional levels.