SLVSIO7 July   2026 LM5192

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements for the Serial Control Bus
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range (VIN)
      2. 7.3.2  High-Voltage Bias Supply Regulators (VCC, VDDA)
      3. 7.3.3  Enable (EN)
      4. 7.3.4  Switching Frequency
      5. 7.3.5  Dual Random Spread Spectrum (DRSS)
      6. 7.3.6  Soft Start
      7. 7.3.7  Output Voltage
      8. 7.3.8  Minimum Controllable On-Time
      9. 7.3.9  Dual Loop Architecture
        1. 7.3.9.1 Voltage Loop Error Amplifier
        2. 7.3.9.2 Current Loop Error Amplifier
      10. 7.3.10 Programmable ILIM
      11. 7.3.11 IOUT Monitor
      12. 7.3.12 Cable Drop Compensation
      13. 7.3.13 Slope Compensation
      14. 7.3.14 Shunt Current Sensing
      15. 7.3.15 Hiccup Mode Current Limiting
      16. 7.3.16 Device Configuration (CNFG)
      17. 7.3.17 Pulse Frequency Modulation (PFM) / Synchronization
      18. 7.3.18 Out-of-Audio Operation
      19. 7.3.19 Thermal Shutdown (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Ready Mode
      4. 7.4.4 Active Mode
      5. 7.4.5 Sleep Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Bus Operation
      2. 7.5.2 Clock Stretching
      3. 7.5.3 Data Transfer Formats
      4. 7.5.4 Single READ from a Defined Register Address
      5. 7.5.5 Sequential READ Starting from a Defined Register Address
      6. 7.5.6 Single WRITE to a Defined Register Address
      7. 7.5.7 Sequential WRITE Starting at a Defined Register Address
  9. 8 LM5192 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Power Train Components
        1. 9.1.1.1 Buck Inductor
        2. 9.1.1.2 Output Capacitors
        3. 9.1.1.3 Input Capacitors
        4. 9.1.1.4 EMI Filter
    2. 9.2 Typical Application
      1. 9.2.1 High Efficiency, Wide Input, 400kHz, Synchronous Buck Regulator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 Buck Inductor
          3. 9.2.1.2.3 Current-Sense Resistance
          4. 9.2.1.2.4 Output Capacitors
          5. 9.2.1.2.5 Input Capacitors
          6. 9.2.1.2.6 Compensation Components
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Thermal Design and Layout
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
        1. 10.2.1.1 PCB Layout Resources
        2. 10.2.1.2 Thermal Design Resources
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

9.1.1.4 EMI Filter

Switching regulators exhibit negative input impedance, which is lowest at the minimum input voltage. An underdamped LC filter exhibits a high output impedance at the resonant frequency of the filter. For stability, the filter output impedance must be less than the absolute value of the regulator input impedance.

Equation 15. ZIN= -VINmin2PIN

The EMI filter design steps are as follows:

  • Calculate the required attenuation of the EMI filter at the switching frequency, where CIN represents the existing capacitance at the input of the switching regulator
  • Input filter inductor LIN is typically selected between 1μH and 10μH, but can be lower to reduce losses in a high-current design.
  • Calculate input filter capacitor CF.

LM5192 Buck Regulator With π-Stage EMI FilterFigure 9-2 Buck Regulator With π-Stage EMI Filter

By calculating the first harmonic current from the Fourier series of the input current waveform and multiplying by the input impedance (the impedance is defined by the existing input capacitor CIN), a formula is derived to obtain the required attenuation as shown by Equation 16.

Equation 16. Attn =20log⁡ILPEAKπ2×FSW×CIN ×sin⁡π×DMAX×11µV-VMAX

where

  • VMAX is the allowed dBμV noise level for the applicable conducted EMI specification, for example CISPR 25 Class 5.
  • CIN is the existing input capacitance of the buck regulator.
  • DMAX is the maximum duty cycle.
  • IPEAK is the peak inductor current.

For filter design purposes, the current at the input can be modeled as a square-wave. Determine the EMI filter capacitance CF from Equation 17.

Equation 17. CF=1LIN10Attn402π×FSW2

Adding an input filter to a switching regulator modifies the control-to-output transfer function. The output impedance of the filter must be sufficiently small such that the input filter does not significantly affect the loop gain of the buck regulator. The impedance peaks at the filter resonant frequency. Calculate the resonant frequency of the filter using the following equation.

Equation 18. fres=12π×LIN×CF

The purpose of RD is to reduce the peak output impedance of the filter at the resonant frequency. Capacitor CD blocks the DC component of the input voltage to avoid excessive power dissipation in RD. Capacitor CD must have lower impedance than RD at the resonant frequency with a capacitance value greater than that of the input capacitor CIN. This prevents CIN from interfering with the cutoff frequency of the main filter. Added damping is needed when the output impedance of the filter is high at the resonant frequency (Q of filter formed by LIN and CIN is too high). An electrolytic capacitor CD can be used for damping with a value given by Equation 19.

Equation 19. CD≥4×CIN

Select the damping resistor RD using Equation 20.

Equation 20. RD=LINCIN