SLVSKW2 January   2026 ADS1278QML-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Quality Conformance Inspection
    7. 5.7 Timing Requirements: SPI Format
    8. 5.8 Timing Requirements: Frame-Sync Format
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Sampling Aperture Matching
      2. 6.3.2  Frequency Response
        1. 6.3.2.1 High-Speed, Low-Power, And Low-Speed Modes
        2. 6.3.2.2 High-Resolution Mode
      3. 6.3.3  Phase Response
      4. 6.3.4  Settling Time
      5. 6.3.5  Data Format
      6. 6.3.6  Analog Inputs (AINP, AINN)
      7. 6.3.7  Voltage Reference Inputs (VREFP, VREFN)
      8. 6.3.8  Clock Input (CLK)
      9. 6.3.9  Mode Selection (MODE)
      10. 6.3.10 Synchronization (SYNC)
      11. 6.3.11 Power-Down ( PWDN)
      12. 6.3.12 Format[2:0]
      13. 6.3.13 Serial Interface Protocols
      14. 6.3.14 SPI Serial Interface
        1. 6.3.14.1 SCLK
        2. 6.3.14.2 DRDY/FSYNC (SPI Format)
        3. 6.3.14.3 DOUT
        4. 6.3.14.4 DIN
      15. 6.3.15 Frame-Sync Serial Interface
        1. 6.3.15.1 SCLK
        2. 6.3.15.2 DRDY/FSYNC (Frame-Sync Format)
        3. 6.3.15.3 DOUT
        4. 6.3.15.4 DIN
      16. 6.3.16 DOUT Modes
        1. 6.3.16.1 TDM Mode
        2. 6.3.16.2 TDM Mode, Fixed-Position Data
        3. 6.3.16.3 TDM Mode, Dynamic Position Data
        4. 6.3.16.4 Discrete Data Output Mode
      17. 6.3.17 Daisy-Chaining
      18. 6.3.18 Modulator Output
      19. 6.3.19 Pin Test Using Test[1:0] Inputs
      20. 6.3.20 VCOM Output
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Community Resources
    3. 8.3 Trademarks
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.9 Typical Characteristics

At TA = 25°C, High-Speed mode, AVDD = 5V, DVDD = 1.8V, IOVDD = 3.3V, fCLK = 27MHz, VREFP = 2.5V,
and VREFN = 0V, unless otherwise noted.

ADS1278QML-SP Output Spectrum
Figure 5-3 Output Spectrum
ADS1278QML-SP Output Spectrum
Figure 5-5 Output Spectrum
ADS1278QML-SP Output Spectrum
Figure 5-7 Output Spectrum
ADS1278QML-SP Output Spectrum
Figure 5-9 Output Spectrum
ADS1278QML-SP Output Spectrum
Figure 5-11 Output Spectrum
ADS1278QML-SP Output Spectrum
Figure 5-13 Output Spectrum
ADS1278QML-SP Output Spectrum
Figure 5-15 Output Spectrum
ADS1278QML-SP Output Spectrum
Figure 5-17 Output Spectrum
ADS1278QML-SP Total Harmonic Distortion vs Frequency
Figure 5-19 Total Harmonic Distortion vs Frequency
ADS1278QML-SP Total Harmonic Distortion vs Frequency
Figure 5-21 Total Harmonic Distortion vs Frequency
ADS1278QML-SP Total Harmonic Distortion vs Frequency
Figure 5-23 Total Harmonic Distortion vs Frequency
ADS1278QML-SP Total Harmonic Distortion vs Frequency
Figure 5-25 Total Harmonic Distortion vs Frequency
ADS1278QML-SP Offset Drift Histogram
Figure 5-27 Offset Drift Histogram
ADS1278QML-SP Offset Warmup Drift Response Band
Figure 5-29 Offset Warmup Drift Response Band
ADS1278QML-SP Offset Error Histogram
Figure 5-31 Offset Error Histogram
ADS1278QML-SP Channel Gain Match Histogram
Figure 5-33 Channel Gain Match Histogram
ADS1278QML-SP Offset and Gain vs Temperature
Figure 5-35 Offset and Gain vs Temperature
ADS1278QML-SP Sampling Match Error Histogram
Figure 5-37 Sampling Match Error Histogram
ADS1278QML-SP Analog Input Differential Impedance vs Temperature
Figure 5-39 Analog Input Differential Impedance vs Temperature
ADS1278QML-SP Integral Nonlinearity vs Temperature
Figure 5-41 Integral Nonlinearity vs Temperature
ADS1278QML-SP Linearity and Total Harmonic Distortion vs Reference Voltage
Figure 5-43 Linearity and Total Harmonic Distortion vs Reference Voltage
ADS1278QML-SP Noise vs Temperature
Figure 5-45 Noise vs Temperature
ADS1278QML-SP Total Harmonic Distortion and Noise vs CLK
Figure 5-47 Total Harmonic Distortion and Noise vs CLK
ADS1278QML-SP Power-Supply Rejection vs Power-Supply Frequency
Figure 5-49 Power-Supply Rejection vs Power-Supply Frequency
ADS1278QML-SP DVDD Current vs Temperature
Figure 5-51 DVDD Current vs Temperature
ADS1278QML-SP Power Dissipation vs Temperature
Figure 5-53 Power Dissipation vs Temperature
ADS1278QML-SP Output Spectrum
Figure 5-4 Output Spectrum
ADS1278QML-SP Noise Histogram
Figure 5-6 Noise Histogram
ADS1278QML-SP Output Spectrum
Figure 5-8 Output Spectrum
ADS1278QML-SP Noise Histogram
Figure 5-10 Noise Histogram
ADS1278QML-SP Output Spectrum
Figure 5-12 Output Spectrum
ADS1278QML-SP Noise Histogram
Figure 5-14 Noise Histogram
ADS1278QML-SP Output Spectrum
Figure 5-16 Output Spectrum
ADS1278QML-SP Noise Histogram
Figure 5-18 Noise Histogram
ADS1278QML-SP Total Harmonic Distortion vs Input Amplitude
Figure 5-20 Total Harmonic Distortion vs Input Amplitude
ADS1278QML-SP Total Harmonic Distortion vs Input Amplitude
Figure 5-22 Total Harmonic Distortion vs Input Amplitude
ADS1278QML-SP Total Harmonic Distortion vs Input Amplitude
Figure 5-24 Total Harmonic Distortion vs Input Amplitude
ADS1278QML-SP Total Harmonic Distortion vs Input Amplitude
Figure 5-26 Total Harmonic Distortion vs Input Amplitude
ADS1278QML-SP Gain Drift Histogram
Figure 5-28 Gain Drift Histogram
ADS1278QML-SP Gain Warmup Drift Response Band
Figure 5-30 Gain Warmup Drift Response Band
ADS1278QML-SP Gain Error Histogram
Figure 5-32 Gain Error Histogram
ADS1278QML-SP Channel Offset Match Histogram
Figure 5-34 Channel Offset Match Histogram
ADS1278QML-SP VCOM Voltage Output Histogram
Figure 5-36 VCOM Voltage Output Histogram
ADS1278QML-SP Reference Input Differential Impedance vs Temperature
Figure 5-38 Reference Input Differential Impedance vs Temperature
ADS1278QML-SP Analog Input Differential Impedance vs Temperature
Figure 5-40 Analog Input Differential Impedance vs Temperature
ADS1278QML-SP Linearity Error vs Input Level
Figure 5-42 Linearity Error vs Input Level
ADS1278QML-SP Noise and Linearity vs Input Common-Mode Voltage
Figure 5-44 Noise and Linearity vs Input Common-Mode Voltage
ADS1278QML-SP Noise vs Reference Voltage
Figure 5-46 Noise vs Reference Voltage
ADS1278QML-SP Common-Mode Rejection vs Input Frequency
Figure 5-48 Common-Mode Rejection vs Input Frequency
ADS1278QML-SP AVDD Current vs Temperature
Figure 5-50 AVDD Current vs Temperature
ADS1278QML-SP IOVDD Current vs Temperature
Figure 5-52 IOVDD Current vs Temperature